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Information for "dec/microarchitectures/strongarm"
Basic information
Display title | StrongARM - Microarchitectures - DEC |
Default sort key | dec/microarchitectures/strongarm |
Page length (in bytes) | 5,141 |
Page ID | 18237 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 1 |
Counted as a content page | Yes |
Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | David (talk | contribs) |
Date of page creation | 14:13, 29 May 2017 |
Latest editor | 82.69.92.196 (talk) |
Date of latest edit | 12:49, 15 July 2018 |
Total number of edits | 18 |
Total number of distinct authors | 3 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
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Facts about "StrongARM - Microarchitectures - DEC"
codename | StrongARM + |
core count | 1 + |
designer | DEC + and ARM Holdings + |
first launched | February 5, 1996 + |
full page name | dec/microarchitectures/strongarm + |
instance of | microarchitecture + |
instruction set architecture | ARMv4 + |
manufacturer | DEC + |
microarchitecture type | CPU + |
name | StrongARM + |
pipeline stages | 5 + |
process | 350 nm (0.35 μm, 3.5e-4 mm) + |