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Information for "arm holdings/microarchitectures/hayes"
Basic information
| Display title | Cortex-A520 - Microarchitectures - ARM |
| Default sort key | Cortex-A520, ARM Holdings |
| Page length (in bytes) | 4,599 |
| Page ID | 36749 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 0 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | David (talk | contribs) |
| Date of page creation | 14:08, 4 July 2022 |
| Latest editor | 95.24.54.50 (talk) |
| Date of latest edit | 20:20, 21 February 2025 |
| Total number of edits | 2 |
| Total number of distinct authors | 2 |
| Recent number of edits (within past 90 days) | 1 |
| Recent number of distinct authors | 1 |
Page properties
| Transcluded templates (11) | Templates used on this page:
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Facts about "Cortex-A520 - Microarchitectures - ARM"
| codename | Cortex-A520 + |
| core count | 4 + |
| designer | ARM Holdings + |
| first launched | April 2023 + |
| full page name | arm holdings/microarchitectures/hayes + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv9.2-A + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Cortex-A520 + |
| process | 4 nm (0.004 μm, 4.0e-6 mm) + |