Revision history of "loongson/godson 2/2g"

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(cur | prev) 15:04, 18 March 2017‎ David (talk | contribs)‎ . . (2,838 bytes) (+2,838)‎ . . (Created page with "{{loongson title|Godson-2G}} {{mpu | name = Godson-2G | image = godson-2g.jpg | image size = 250px | caption = Godson-2G chip...")

base frequency	1,000 MHz (1 GHz, 1,000,000 kHz) +
bus speed	400 MHz (0.4 GHz, 400,000 kHz) +
bus type	HyperTransport 1.0 +
clock multiplier	2.5 +
core count	1 +
core name	GS464 +
designer	Loongson +
die area	53.54 mm² (0.083 in², 0.535 cm², 53,540,000 µm²) +
family	Godson 2 +
first announced	April 2009 +
first launched	November 2010 +
full page name	loongson/godson 2/2g +
has ecc memory support	true +
instance of	microprocessor +
isa	MIPS64 +
isa family	MIPS +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	4-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	4-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	4-way set associative +
l2$ size	1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldate	November 2010 +
main image	+
main image caption	Godson-2G chip +
manufacturer	STMicroelectronics +
market segment	Desktop +
max cpu count	1 +
max memory bandwidth	11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) +
max memory channels	1 +
microarchitecture	GS464 +
model number	2G +
name	Godson-2G +
power dissipation	3 W (3,000 mW, 0.00402 hp, 0.003 kW) +
process	65 nm (0.065 μm, 6.5e-5 mm) +
series	Godson 2 +
smp max ways	1 +
supported memory type	DDR3-800 +
technology	CMOS +
thread count	1 +
transistor count	100,000,000 +
word size	64 bit (8 octets, 16 nibbles) +

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