Revision history of "intel/celeron/n3050"

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(cur | prev) 08:40, 8 July 2022‎ 24.186.250.71 (talk)‎ . . (4,515 bytes) (+78)‎ . . (Added 1) Secure Boot; and 2) Model using ASUS TP200SA) (undo)
(cur | prev) 05:35, 5 February 2022‎ 117.7.113.112 (talk)‎ . . (4,437 bytes) (+36)‎ . . (undo)
(cur | prev) 11:30, 17 May 2021‎ 16.162.3.104 (talk)‎ . . (4,401 bytes) (+36)‎ . . (Added a new device E202SA) (undo)
(cur | prev) 10:10, 15 August 2019‎ 93.41.113.88 (talk)‎ . . (4,365 bytes) (-17)‎ . . (undo)
(cur | prev) 02:58, 21 March 2019‎ Muyl1 (talk | contribs)‎ m . . (4,382 bytes) (+90)‎ . . (Added Utilizing Devices section) (undo)
(cur | prev) 16:39, 27 March 2018‎ David (talk | contribs)‎ . . (4,292 bytes) (+23)‎ . . (undo)
(cur | prev) 16:03, 27 March 2018‎ David (talk | contribs)‎ . . (4,269 bytes) (-777)‎ . . (eol) (undo)
(cur | prev) 15:16, 13 December 2017‎ ChippyBot (talk | contribs)‎ m . . (5,046 bytes) (+1)‎ . . (Bot: moving all {{mpu}} to {{chip}}) (undo)
(cur | prev) 14:53, 13 December 2017‎ ChippyBot (talk | contribs)‎ m . . (5,045 bytes) (-4)‎ . . (Bot: Replacing old {{mpu expansions}} template with {{expansions}}) (undo)
(cur | prev) 14:46, 13 December 2017‎ ChippyBot (talk | contribs)‎ m . . (5,049 bytes) (0)‎ . . (Bot: replacing deprecated (and now obselete) {{mpu features}} with {{x86 features}}) (undo)
(cur | prev) 17:22, 30 June 2017‎ ChippyBot (talk | contribs)‎ m . . (5,049 bytes) (0)‎ . . (Bot: corrected param) (undo)
(cur | prev) 21:17, 23 June 2017‎ ChippyBot (talk | contribs)‎ m . . (5,049 bytes) (-27)‎ . . (Bot: Automated text replacement (-\| electrical += Yes +)) (undo)
(cur | prev) 02:23, 23 June 2017‎ ChippyBot (talk | contribs)‎ m . . (5,076 bytes) (+2)‎ . . (Bot: corrected mem) (undo)
(cur | prev) 15:16, 9 December 2016‎ David (talk | contribs)‎ . . (5,074 bytes) (+59)‎ . . (undo)
(cur | prev) 10:58, 4 November 2016‎ At32Hz (talk | contribs)‎ . . (5,015 bytes) (+30)‎ . . (undo)
(cur | prev) 22:22, 20 September 2016‎ ChipIt (talk | contribs)‎ . . (4,985 bytes) (+7)‎ . . (→‎Cache) (undo)
(cur | prev) 00:47, 19 September 2016‎ ChipIt (talk | contribs)‎ . . (4,978 bytes) (+1)‎ . . (undo)
(cur | prev) 22:12, 10 April 2016‎ At32Hz (talk | contribs)‎ . . (4,977 bytes) (-1)‎ . . (→‎Cache) (undo)
(cur | prev) 22:00, 10 April 2016‎ At32Hz (talk | contribs)‎ . . (4,978 bytes) (+3,013)‎ . . (undo)
(cur | prev) 21:50, 10 April 2016‎ At32Hz (talk | contribs)‎ . . (1,965 bytes) (+1,965)‎ . . (Created page with "{{intel title|Celeron N3050}} {{mpu | name = Intel Celeron N3050 | no image = Yes | manufacturer = Intel | model number = N3050 | part...")

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Celeron N3050 - Intel#io +
base frequency	1,600 MHz (1.6 GHz, 1,600,000 kHz) +
bus type	IDI +
core count	2 +
core name	Braswell +
core stepping	C0 +
designer	Intel +
family	Celeron +
first announced	March 2015 +
first launched	March 2015 +
full page name	intel/celeron/n3050 +
has feature	integrated gpu +, Advanced Encryption Standard Instruction Set Extension + and Enhanced SpeedStep Technology +
has intel enhanced speedstep technology	true +
has locked clock multiplier	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	HD Graphics (Braswell) +
integrated gpu base frequency	320 MHz (0.32 GHz, 320,000 KHz) +
integrated gpu max frequency	600 MHz (0.6 GHz, 600,000 KHz) +
integrated gpu max memory	8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB) +
isa	x86-64 +
isa family	x86 +
l1d$ description	6-way set associative +
l1d$ size	48 KiB (49,152 B, 0.0469 MiB) +
l1i$ description	8-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	16-way set associative +
l2$ size	1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description	No L3$ +
l3$ size	0 MiB (0 KiB, 0 B, 0 GiB) +
last order	June 8, 2018 +
last shipment	December 7, 2018 +
ldate	March 2015 +
manufacturer	Intel +
market segment	Mobile +
max cpu count	1 +
max memory	8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max operating temperature	90 °C +
max pcie lanes	4 +
microarchitecture	Airmont +
min operating temperature	0 °C +
model number	N3050 +
name	Intel Celeron N3050 +
part number	FH8066501715914 + and FH8066501715925 +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 107.00 (€ 96.30, £ 86.67, ¥ 11,056.31) +
s-spec	SR29H + and SR2A9 +
sdp	4 W (4,000 mW, 0.00536 hp, 0.004 kW) +
series	N3000 +
smp max ways	1 +
tdp	6 W (6,000 mW, 0.00805 hp, 0.006 kW) +
technology	CMOS +
thread count	2 +
turbo frequency (1 core)	2,160 MHz (2.16 GHz, 2,160,000 kHz) +
used by	ASUSPRO P2520SA +, ASUS EeeBook E202SA +, Acer Aspire ES1-531 + and ASUS TP200SA DH04T 11.6" transformer book +
word size	64 bit (8 octets, 16 nibbles) +

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