From WikiChip
Revision history of "intel/celeron/j4005"
View logs for this page

Diff selection: Mark the radio boxes of the revisions to compare and hit enter or the button at the bottom.
Legend: (cur) = difference with latest revision, (prev) = difference with preceding revision, m = minor edit.

Retrieved from "https://en.wikichip.org/wiki/intel/celeron/j4005"
Facts about "Celeron J4005 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Celeron J4005 - Intel#package + and Celeron J4005 - Intel#pcie +
base frequency2,000 MHz (2 GHz, 2,000,000 kHz) +
clock multiplier20 +
core count2 +
core nameGemini Lake +
core steppingB0 +
designerIntel +
device id0x3185 +
familyCeleron +
first announcedDecember 11, 2017 +
first launchedDecember 11, 2017 +
full page nameintel/celeron/j4005 +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureAdvanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Smart Response Technology +, Identity Protection Technology +, Extended Page Tables + and Software Guard Extensions +
has intel enhanced speedstep technologytrue +
has intel identity protection technology supporttrue +
has intel smart response technology supporttrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuUHD Graphics 600 +
integrated gpu base frequency250 MHz (0.25 GHz, 250,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units12 +
integrated gpu max frequency700 MHz (0.7 GHz, 700,000 KHz) +
integrated gpu max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB) +
isax86-64 +
isa familyx86 +
l1$ size112 KiB (114,688 B, 0.109 MiB) +
l1d$ description6-way set associative +
l1d$ size48 KiB (49,152 B, 0.0469 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
ldateDecember 11, 2017 +
main imageFile:gemini lake (front).png +
manufacturerIntel +
market segmentDesktop +
max cpu count1 +
max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max memory bandwidth35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels2 +
microarchitectureGoldmont Plus +
model numberJ4005 +
nameCeleron J4005 +
packageFCBGA-1090 +
part numberFH8068003067416 +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 107.00 (€ 96.30, £ 86.67, ¥ 11,056.31) +
s-specSR3S5 +
series4000 +
smp max ways1 +
supported memory typeDDR4-2666 +
tdp10 W (10,000 mW, 0.0134 hp, 0.01 kW) +
technologyCMOS +
thread count2 +
turbo frequency (1 core)2,700 MHz (2.7 GHz, 2,700,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +
x86/has software guard extensionstrue +