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(cur | prev) 22:45, 31 July 2018‎ David (talk | contribs)‎ . . (35 bytes) (+35)‎ . . (hi1612)

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Hi1612 - HiSilicon#pcie +
base frequency	2,100 MHz (2.1 GHz, 2,100,000 kHz) +
core count	32 +
core name	Cortex-A57 +
designer	HiSilicon + and ARM Holdings +
family	Hi16xx +
first announced	June 4, 2016 +
first launched	June 4, 2016 +
full page name	hisilicon/kunpeng/hi1612 +
has ecc memory support	true +
instance of	microprocessor +
isa	ARMv8 +
isa family	ARM +
l1$ size	2,560 KiB (2,621,440 B, 2.5 MiB) +
l1d$ description	8-way set associative +
l1d$ size	1,024 KiB (1,048,576 B, 1 MiB) +
l1i$ description	8-way set associative +
l1i$ size	1,536 KiB (1,572,864 B, 1.5 MiB) +
l2$ description	8-way set associative +
l2$ size	8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
l3$ description	16-way set associative +
l3$ size	32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) +
ldate	June 4, 2016 +
manufacturer	TSMC +
market segment	Server +
max cpu count	2 +
max memory	262,144 MiB (268,435,456 KiB, 274,877,906,944 B, 256 GiB, 0.25 TiB) +
max memory bandwidth	63.58 GiB/s (65,105.92 MiB/s, 68.269 GB/s, 68,268.505 MB/s, 0.0621 TiB/s, 0.0683 TB/s) +
max memory channels	4 +
microarchitecture	Cortex-A57 +
model number	Hi1612 +
name	Hi1612 +
process	16 nm (0.016 μm, 1.6e-5 mm) +
smp max ways	2 +
supported memory type	DDR4-2133 +
technology	CMOS +
thread count	32 +
used by	HiSilicon D03 + and Huawei Taishan 2180 +
word size	64 bit (8 octets, 16 nibbles) +

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