Revision history of "hisilicon/k3/k3v1"

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(cur | prev) 20:30, 3 June 2018‎ At32Hz (talk | contribs)‎ . . (2,557 bytes) (-88)‎ . . (Undo revision 78976 by 24.168.200.123 (talk) I don't think this is correct) (undo)
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(cur | prev) 22:47, 5 September 2017‎ Inject (talk | contribs)‎ . . (364 bytes) (+364)‎ . . (Created page with "{{hisilicon title|K3V1}} {{mpu}} '''K3V1''' is a {{arch|32}} performance ARM microprocessor introduced by HiSilicon in 2008. This chip incorporates a single core...")

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	K3V1 - HiSilicon#package +
base frequency	460 MHz (0.46 GHz, 460,000 kHz) +
core count	1 +
core name	ARM926EJ-S +
designer	HiSilicon + and ARM Holdings +
family	K3 +
first announced	June 2008 +
first launched	June 2008 +
full page name	hisilicon/k3/k3v1 +
has ecc memory support	false +
instance of	microprocessor +
io voltage	1.8 V (18 dV, 180 cV, 1,800 mV) + and 2.5 V (25 dV, 250 cV, 2,500 mV) +
isa	ARMv5 +
isa family	ARM +
l1$ size	32 KiB (32,768 B, 0.0313 MiB) +
l1d$ description	4-way set associative +
l1d$ size	16 KiB (16,384 B, 0.0156 MiB) +
l1i$ description	4-way set associative +
l1i$ size	16 KiB (16,384 B, 0.0156 MiB) +
ldate	June 2008 +
manufacturer	TSMC +
market segment	Mobile +
max cpu count	1 +
max memory channels	1 +
microarchitecture	ARM9 +
model number	K3V1 +
name	K3V1 +
package	TFBGA-460 +
part number	Hi3611 +
process	180 nm (0.18 μm, 1.8e-4 mm) +
smp max ways	1 +
supported memory type	DDR +
technology	CMOS +
thread count	1 +
transistor count	200,000,000 +
word size	32 bit (4 octets, 8 nibbles) +

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