From WikiChip
Revision history of "arm holdings/microarchitectures/cortex-x2"
View logs for this page

Diff selection: Mark the radio boxes of the revisions to compare and hit enter or the button at the bottom.
Legend: (cur) = difference with latest revision, (prev) = difference with preceding revision, m = minor edit.

Retrieved from "https://en.wikichip.org/wiki/arm_holdings/microarchitectures/cortex-x2"
Facts about "Cortex-X2 (Matterhorn-ELP) - Microarchitectures - ARM"
RDF feed
codenameCortex-X2 (Matterhorn-ELP) +
core count1 +, 2 +, 4 +, 6 +, 8 +, 10 + and 12 +
designerARM Holdings +
first launched2021 +
full page namearm holdings/microarchitectures/cortex-x2 +
instance ofmicroarchitecture +
instruction set architectureARMv9.0-A +
manufacturerTSMC +
microarchitecture typeCPU +
nameCortex-X2 (Matterhorn-ELP) +
pipeline stages288 +
process5 nm (0.005 μm, 5.0e-6 mm) +, 7 nm (0.007 μm, 7.0e-6 mm) + and 10 nm (0.01 μm, 1.0e-5 mm) +