-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Revision history of "arm holdings/microarchitectures/cortex-m55"
Diff selection: Mark the radio boxes of the revisions to compare and hit enter or the button at the bottom.
Legend: (cur) = difference with latest revision, (prev) = difference with preceding revision, m = minor edit.
Facts about "Cortex-M55 - Microarchitectures - ARM"
codename | Cortex-M55 + |
core count | 1 +, 2 + and 4 + |
designer | ARM Holdings + |
first launched | February 10, 2020 + |
full page name | arm holdings/microarchitectures/cortex-m55 + |
instance of | microarchitecture + |
instruction set architecture | ARMv8.1-M + |
manufacturer | TSMC + |
microarchitecture type | CPU + |
name | Cortex-M55 + |
pipeline stages (max) | 5 + |
pipeline stages (min) | 4 + |
process | 55 nm (0.055 μm, 5.5e-5 mm) +, 45 nm (0.045 μm, 4.5e-5 mm) +, 32 nm (0.032 μm, 3.2e-5 mm) +, 28 nm (0.028 μm, 2.8e-5 mm) +, 22 nm (0.022 μm, 2.2e-5 mm) +, 16 nm (0.016 μm, 1.6e-5 mm) +, 10 nm (0.01 μm, 1.0e-5 mm) +, 7 nm (0.007 μm, 7.0e-6 mm) + and 5 nm (0.005 μm, 5.0e-6 mm) + |