Editing intel/mcs-4/4004

{{intel title|4004}}
{{mpu
|name=4004
|image=intel 4004 chip.jpg
|caption=Intel C4004, 4004 in CerDIP
|designer=Intel
|manufacturer=Intel
|model number=4004
|part number=C4004
|part number 2=D4004
|part number 3=P4004
|market=Commercial
|market 2=Industrial
|first announced=November 15, 1971
|first launched=December, 1971
|last order=1982
|family=MCS-4
|series=MCS
|frequency=500 kHz
|frequency 2=740 kHz
|isa=4004
|isa family=4004
|microarch=4004
|chipset=4001
|chipset 2=4002
|chipset 3=4003
|process=10 µm
|transistors=2,250
|technology=pMOS
|die area=12 mm²
|die length=4 mm
|die width=3 mm
|word size=4 bit
|core count=1
|thread count=1
|max memory addr=4 kB
|power=1 W
|v core=15 V
|v core tolerance=5%
|tstorage min=-55 °C
|tstorage max=125 °C
|tambient min=0 °C
|tambient max=70 °C
|packaging=Yes
|package 0=CerDIP-16
|package 0 type=CerDIP
|package 0 pins=16
|package 0 pitch=2.54 mm
|package 0 width=18.7 mm
|package 0 length=7.5 mm
|package 0 height=5.1 mm
|package 1=DIP-16
|package 1 type=DIP
|package 1 pins=16
|package 1 pitch=2.3 mm
|package 1 width=18.9 mm
|package 1 length=6.2 mm
|package 1 height=5.1 mm
}}
The '''Intel 4004''' was released by [[Intel Corporation]] in [[1971]] and was the first commercially available [[microprocessor]]. The 4004 was a [[4-bit architecture|4-bit CPU]], designed for use in the [[Busicom]] 141-PF printing calculator<ref>[http://www.intel.com/content/www/us/en/history/museum-story-of-intel-4004.html The Story of the Intel® 4004]</ref>. The chip, which is clocked at 740 KHz, employs a 10µm<ref>[http://www.intel.com/Assets/PDF/DataSheet/4004_datasheet.pdf 4004 Datasheet]</ref> process silicon-gate, capable of executing 92,000 instructions per second. The chip was capable of accessing 4KB of [[program memory]] and 640 bytes of RAM. The 4004 was part of the [[Intel MCS-4]] system.

The microprocessor had a limited architecture, such as: only a 3-levels deep [[stack]], a complex memory access scheme, and no [[interrupt]] support. In [[1974]] Intel released an enhanced version of the chip called the [[Intel 4040|4040]].

== Variations ==
[[File:KL National INS4004.jpg|100px|thumbnail|left|A National Semiconductor version of the 4004, INS4004J]]
Three primary source variations were produced by Intel: C4004, D4004 and the P4004. The ''Intel C4004'' was the first chip to be manufactured; it had the gray traces visible on the white ceramic package itself. The C4004 was produced up until mid 1976, when production for the ''Intel D4004'' began. The D4004 had a plastic, black ceramic package. The ''Intel P4004'' is the plastic packaging version.

A couple secondary sources exists, which has been developed by National Semiconductor and Hitachi since mid-1975. National Semiconductor produced two versions: ''INS4004J'' and ''INS4004D''. The ''INS4004J'' is a 16-pin black, ceramic DIP, while the ''INS4004D'' version is a 16-pin side-brazed, ceramic DIP. The other source was the {{hitachi|HD35404}} made by [[Hitachi]]. A third source was [[Microsystems International]] which actually manufactured an enhanced version of the chip since mid 1970 (also introduced in 1971).

{| class="wikitable"
|-
! Manufacturer !! Model !! Package
|-
| Intel || C4004 || 16-pin Ceramic DIP
|-
| Intel || D4004 || 16-pin Ceramic DIP
|-
| Intel || P4004 || 16-pin Plastic DIP
|-
| [[National Semiconductor]] || INS4004D || 16-pin Ceramic DIP
|-
| National Semiconductor || INS4004J || 16-pin side-brazed Ceramic DIP
|-
| [[Hitachi]] || {{hitachi|HD35404}} || 16-pin DIP
|-
| [[Microsystems International]] || {{mil|MF7114}} || ?
|}
{{clear}}

== Pinout ==
[[File:4004 dil.svg|thumbnail|300px|right|Pinout diagram of the Intel 4004]]
The 4004 has 16 pins that are used for i/o, memory controller, clock phases, power and reset.

{| class="wikitable"
|-
|+  Pinout & Description
|-
! style="width: 25px;" | Pin # !! style="width:50px;" | Pin Name !! style="width:30px;" | Purpose !! style="width:40px;" | Explanation
|-
| 1 || D0 || rowspan="4" | Bidirectional data bus pins ||  rowspan="4" | Address and data communication to the ROM and RAM occurs on D0-D3.
|-
| 2 || D1
|-
| 3 || D2
|-
| 4 || D3
|-
| 5 || V<sub>ss</sub> || Main Supply ||
|-
| 6 || Clock Phase 1 || rowspan="2" | Clock inputs || rowspan="2" | 
|-
| 7 || Clock Phase 2
|-
| 8 || Sync || ROM & RAM Sync || Synchronizes the ROM and RAM by signaling the clock is on the raising edge.
|-
| 9 || Reset || Reset flag || A logic 1 clears all processor status registers and forces the program counter to jump to address 0x0. The RESET signal must be on for at least 64 clock cycles in order to take effect.
|-
| 10 || Test || Test logic state || Signal can be tested via the <code>JCN</code> instruction.
|-
| 11 || CM-ROM || CM-ROM output || ROM selection signal used to retrieve data from memory.
|-
| 12 || V<sub>DD</sub> || V<sub>SS</sub> -15±5% ||
|-
| 13 || CM-RAM<sub>3</sub> || rowspan="4" | CM-ROM outputs || rowspan="4" | Bank selection signal for the [[Intel 4002|4002 RAM]] chips in the system.
|-
| 14 || CM-RAM<sub>2</sub>
|-
| 15 || CM-RAM<sub>1</sub>
|-
| 16 || CM-RAM<sub>0</sub>
|}

== Designers ==
Lead designers for the 4004 are:
* [[designer::Ted Hoff]]
* [[designer::Federico Faggin]]
* [[designer::Stan Mazor]]
* [[designer::Masatoshi Shim]]

== Die Shot ==
* [[10 µm process]]
* [[pMOS]] transistors
* 2,250 transistors
* 12 mm² die
[[File:4004 die shot.png]]

== References ==
{{reflist}}
base frequency	0.5 MHz (5.0e-4 GHz, 500 kHz) + and 0.74 MHz (7.4e-4 GHz, 740 kHz) +
chipset	4001 +, 4002 + and 4003 +
core count	1 +
core voltage	15 V (150 dV, 1,500 cV, 15,000 mV) +
core voltage tolerance	5% +
designer	Ted Hoff +, Federico Faggin +, Stan Mazor +, Intel + and Masatoshi Shim +
die area	12 mm² (0.0186 in², 0.12 cm², 12,000,000 µm²) +
die length	4 mm (0.4 cm, 0.157 in, 4,000 µm) +
die width	3 mm (0.3 cm, 0.118 in, 3,000 µm) +
family	MCS-4 +
first announced	November 15, 1971 +
first launched	December 1971 +
full page name	intel/mcs-4/4004 +
instance of	microprocessor +
isa	4004 +
isa family	4004 +
last order	1982 +
ldate	December 1971 +
main image	+
main image caption	4004 in CerDIP +
manufacturer	Intel +
market segment	Commercial + and Industrial +
max ambient temperature	343.15 K (70 °C, 158 °F, 617.67 °R) +
max memory address	4 kB +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	4004 +
min ambient temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	218.15 K (-55 °C, -67 °F, 392.67 °R) +
model number	4004 +
name	4004 +
part number	C4004 +, P4004 + and D4004 +
power dissipation	1 W (1,000 mW, 0.00134 hp, 0.001 kW) +
process	10,000 nm (10 μm, 0.01 mm) +
series	MCS +
technology	pMOS +
thread count	1 +
transistor count	2,250 +
word size	4 bit (0.5 octets, 1 nibbles) +