From WikiChip
Editing dec/strongarm
Revision as of 12:26, 29 May 2017 by David (talk | contribs) (Created page with "{{dec title|StrongARM}} '''StrongARM''' ('''SA''') was a family of {{arch|32}} performance ARM processors for the embedded market designed collaboratively by DEC and [...")
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)

Warning: You are editing an out-of-date revision of this page. If you save it, any changes made since this revision will be lost.

Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.

This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.

Please note that all contributions to WikiChip may be edited, altered, or removed by other contributors. If you do not want your writing to be edited mercilessly, then do not submit it here.
You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource (see WikiChip:Copyrights for details). Do not submit copyrighted work without permission!

Cancel | Editing help (opens in new window)

Templates used on this page:

Retrieved from "https://en.wikichip.org/wiki/dec/strongarm"
Facts about "StrongARM - DEC"
RDF feed
designerDEC +, ARM Holdings + and Intel +
full page namedec/strongarm +
instance ofmicroprocessor family +
instruction set architectureARMv4 +
main designerDEC +
manufacturerDEC + and Intel +
microarchitectureStrongARM +
nameStrongARM +
packageMBGA-256 +
process350 nm (0.35 μm, 3.5e-4 mm) + and 250 nm (0.25 μm, 2.5e-4 mm) +
technologyCMOS +
word size32 bit (4 octets, 8 nibbles) +