Editing loongson/godson 2/2c

{{loongson title|Godson-2C}}
{{mpu
| name                = Godson-2C
| image               = godson-2c.jpg
| image size          = 250px
| caption             = Godson-2C chip
| designer            = Loongson
| manufacturer        = SMICS
| model number        = 2C
| part number         = DXP100
| part number 1       = 
| market              = Desktop
| first announced     = 2004
| first launched      = September 28, 2004
| last order          = 
| last shipment       = 
| release price       = 

| family              = Godson 2
| series              = Godson 2
| locked              = 
| frequency           = 500 MHz
| frequency 2         = 
| frequency N         = 
| bus type            = <!-- (Property::bus type) -->
| bus speed           = <!-- (Property::bus speed) -->
| bus rate            = <!-- (Property::bus rate) -->
| bus links           = <!-- ?x bus rate -->
| clock multiplier    =

| isa family          = MIPS
| isa                 = MIPS64
| microarch           = GS464
| platform            = 
| chipset             = 
| core name           = GS464
| core family         = 
| core model          = 
| core stepping       = 
| process             = 180 nm
| transistors         = 13,500,000
| technology          = CMOS
| die area            = 41.54 mm²
| die width           = 6,700 µm
| die length          = 6,200 µm
| word size           = 64 bit
| core count          = 1
| thread count        = 1
| max cpus            = 1
| max memory          = 

| electrical          = Yes
| power               = 5 W
| v core              = 
| v core tolerance    = <!-- OR ... -->
| v core min          = 
| v core max          = 
| v io                = 
| v io tolerance      = 
| v io 2              = <!-- OR ... -->
| v io 3              = 
| sdp                 = 
| tdp                 = 
| tdp typical         = 
| ctdp down           = 
| ctdp down frequency = 
| ctdp up             = 
| ctdp up frequency   = 
| temp min            = 
| temp max            = 
| tjunc min           = <!-- .. °C -->
| tjunc max           = 
| tcase min           = 
| tcase max           = 
| tstorage min        = 
| tstorage max        = 
| tambient min        = 
| tambient max        = 

| packaging           = <!-- put Yes if packaging info is added -->
| package 0           = 
| package 0 type      = 
| package 0 pins      = 
| package 0 pitch     = 
| package 0 width     = 
| package 0 length    = 
| package 0 height    = 
| socket 0            = 
| socket 0 type       = 
}}
'''Godson-2C''' ('''龙芯2C''') is a {{arch|64}} [[MIPS]] performance processor developed by [[Institute of Computing Technology of the Chinese Academy of Sciences|ICT]] and later [[Loongson]] for desktop computers. Introduced in late [[2004]], the Godson-2C operates at up to 500 MHz consuming 3-5W. This chip was manufactured on [[SMICS]]' [[0.18 µm process]].

The Godson-2C provides roughly three times the performance of {{\\|2B}}. The 2C has twice the cache and almost twice the frequency as the {{\\|2B}}, along with an improved [[branch predictor]].

Loongson has claimed the Godson-2C has reached the performance level of high-end {{intel|PIII}} based on their SPECint2000 scores.

== Cache ==
{{main|loongson/microarchitectures/GS464#Memory_Hierarchy|l1=GS464 § Cache}}
This chip was typically combined with 1 MiB - 8 MiB [[L2 cache]] off-die (on the motherboard).
{{cache size
|l1 cache=128 KiB
|l1i cache=64 KiB
|l1i break=1x64 KiB
|l1i desc=4-way set associative
|l1d cache=64 KiB
|l1d break=1x64 KiB
|l1d desc=4-way set associative
|l1d policy=
}}

== References ==
* Hu, Wei-Wu, and Jian Wang. "Making effective decisions in computer architects’ real-world: Lessons and experiences with Godson-2 processor designs." Journal of Computer Science and Technology 23.4 (2008): 620-632.
base frequency	500 MHz (0.5 GHz, 500,000 kHz) +
core count	1 +
core name	GS464 +
designer	Loongson +
die area	41.54 mm² (0.0644 in², 0.415 cm², 41,540,000 µm²) +
die length	6.2 mm (0.62 cm, 0.244 in, 6,200 µm) +
die width	6.7 mm (0.67 cm, 0.264 in, 6,700 µm) +
family	Godson 2 +
first announced	2004 +
first launched	September 28, 2004 +
full page name	loongson/godson 2/2c +
instance of	microprocessor +
isa	MIPS64 +
isa family	MIPS +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	4-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	4-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
ldate	September 28, 2004 +
main image	+
main image caption	Godson-2C chip +
manufacturer	SMICS +
market segment	Desktop +
max cpu count	1 +
microarchitecture	GS464 +
model number	2C +
name	Godson-2C +
part number	DXP100 +
power dissipation	5 W (5,000 mW, 0.00671 hp, 0.005 kW) +
process	180 nm (0.18 μm, 1.8e-4 mm) +
series	Godson 2 +
smp max ways	1 +
technology	CMOS +
thread count	1 +
transistor count	13,500,000 +
word size	64 bit (8 octets, 16 nibbles) +