Editing intel/celeron/u3405

{{intel title|Celeron U3405}}
{{mpu
| name                = Intel Celeron U3405
| no image            = yes
| image               = 
| image size          = 
| caption             = 
| designer            = Intel
| manufacturer        = Intel
| model number        = U3405
| part number         = CN80617006201AA
| market              = Mobile
| first announced     = August, 15 2010
| first launched      = August, 15 2010
| last order          = 
| last shipment       = 
| release price       = 

| family              = Celeron
| series              = P3000
| locked              = Yes
| frequency           = 1,066.66 MHz
| bus type            = DMI 1.0
| bus speed           = 
| bus rate            = 2.5 GT/s
| bus links           = 1
| clock multiplier    = 8
| s-spec              = SLBWX
| s-spec 2            = 
| s-spec qs           = 
| cpuid               = 0x20655

| microarch           = Westmere
| platform            = Calpella
| chipset             = Ibex Peak
| core name           = Arrandale
| core family         = 6
| core model          = 37
| core stepping       = K0
| process             = 32 nm
| transistors         = 382,000,000
| technology          = CMOS
| die area            = 81 mm²
| die width           = 
| die length          = 
| word size           = 64 bit
| core count          = 2
| thread count        = 2
| max cpus            = 1
| max memory          = 8 GiB

| electrical          = Yes
| v core              = 
| v core tolerance    = 
| v io                = 
| v io tolerance      = 
| sdp                 = 
| tdp                 = 18 W
| tjunc min           = 0 °C
| tjunc max           = 90 °C
| tcase min           = 
| tcase max           = 
| tstorage min        = -25 °C
| tstorage max        = 125 °C
| tambient min        = 
| tambient max        = 

| package module 1    = {{packages/intel/bga-1288}}
}}
'''Celeron U3405''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency of 1.06 GHz and a TDP of 18 W. This MPU is manufactured on a [[32 nm process]] based on the {{intel|Westmere|l=arch}} microarchitecture ({{intel|Arrandale|l=core}} core). This processor incorporated the {{intel|HD Graphics (Ironlake)}} [[IGP]] on the same package operating at a base frequency of 166.00 MHz and a burst frequency of 500.00 MHz.

== Cache ==
{{main|intel/microarchitectures/westmere#Memory_Hierarchy|l1=Westmere § Cache}}
{{cache size
|l1 cache=128 KiB
|l1i cache=64 KiB
|l1i break=2x32 KiB
|l1i desc=4-way set associative
|l1i policy=write-back
|l1d cache=64 KiB
|l1d break=2x32 KiB
|l1d desc=8-way set associative
|l1d policy=write-back
|l2 cache=512 KiB
|l2 break=2x256 KiB
|l2 desc=8-way set associative
|l2 policy=write-back
|l3 cache=2 MiB
|l3 break=2x1 MiB
|l3 desc=8-way set associative
|l3 policy=write-back
}}

== Memory controller ==
{{memory controller
|type=DDR3-1066
|ecc=Yes
|max mem=8 GiB
|controllers=1
|channels=2
|max bandwidth=15.88 GiB/s
|bandwidth schan=7.942 GiB/s
|bandwidth dchan=15.88 GiB/s
|pae=36 bit
}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Celeron U3405 - Intel#package + and Celeron U3405 - Intel#io +
base frequency	1,066.66 MHz (1.067 GHz, 1,066,660 kHz) +
bus links	1 +
bus rate	2,500 MT/s (2.5 GT/s, 2,500,000 kT/s) +
bus type	DMI 1.0 +
chipset	Ibex Peak +
clock multiplier	8 +
core count	2 +
core family	6 +
core model	37 +
core name	Arrandale +
core stepping	K0 +
cpuid	0x20655 +
designer	Intel +
device id	0x0046 +
die area	81 mm² (0.126 in², 0.81 cm², 81,000,000 µm²) +
family	Celeron +
first announced	August 15, 2010 +
first launched	August 15, 2010 +
full page name	intel/celeron/u3405 +
has ecc memory support	true +
has feature	Flex Memory Access + and Enhanced SpeedStep Technology +
has intel enhanced speedstep technology	true +
has intel flex memory access support	true +
has locked clock multiplier	true +
instance of	microprocessor +
integrated gpu	HD Graphics (Ironlake) +
integrated gpu base frequency	166 MHz (0.166 GHz, 166,000 KHz) +
integrated gpu designer	Intel +
integrated gpu execution units	12 +
integrated gpu max frequency	500 MHz (0.5 GHz, 500,000 KHz) +
isa	x86-64 +
isa family	x86 +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	8-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	4-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	8-way set associative +
l2$ size	0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description	8-way set associative +
l3$ size	2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldate	August 15, 2010 +
manufacturer	Intel +
market segment	Mobile + and Embedded +
max cpu count	1 +
max junction temperature	363.15 K (90 °C, 194 °F, 653.67 °R) +
max memory	8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max memory bandwidth	15.88 GiB/s (16,261.12 MiB/s, 17.051 GB/s, 17,051.02 MB/s, 0.0155 TiB/s, 0.0171 TB/s) +
max memory channels	2 +
max pcie lanes	16 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Westmere +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	U3405 +
name	Intel Celeron U3405 +
package	BGA-1288 +
part number	CN80617006201AA +
platform	Calpella +
process	32 nm (0.032 μm, 3.2e-5 mm) +
s-spec	SLBWX +
series	P3000 +
smp max ways	1 +
supported memory type	DDR3-1066 +
tdp	18 W (18,000 mW, 0.0241 hp, 0.018 kW) +
technology	CMOS +
thread count	2 +
transistor count	382,000,000 +
word size	64 bit (8 octets, 16 nibbles) +