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VY86C610C
General Info
Designer	ARM Holdings
Manufacturer	VLSI Technology
Model Number	VY86C610C
Part Number	VY86C610C, VY86C610C-5
Market	Embedded, Desktop
Introduction	July 23, 1994 (launched)
General Specs
Family	VL86Cx
Frequency	33 MHz
Microarchitecture
ISA	ARMv3 (ARM)
Microarchitecture	ARM6
Chipset	MEMC, VIDC, IOC
Core Name	ARM610
Process	0.6 µm
Transistors	358,931
Technology	CMOS
Die	26 mm²
Word Size	32 bit
Cores	1
Threads	1
Max Memory	4 GiB
Max Address Mem	0xFFFFFFFF
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Electrical
Power dissipation	0.5 W
Vcore	5 V ± 5 %
Tstorage	-65 °C – -150 °C
Tambient	-10 °C – 70 °C
Packaging
Package TQFP-144 (TQFP) Dimension 20 mm x 20 mm x 1.6 mm Pitch 0.5 mm Pin Count 144

VY86C610C is a 32-bit ARM microprocessor designed by ARM and introduce by VTI in 1994. This processor is based on the ARM6 microarchitecture (ARM610 core). This chip is an enhanced version of the original VY86C610, manufactured on VLSI's 0.6 µm process and operating at 33 MHz.

According to ARM, this processor had the performance of 30 Dhrystone (2.2) MIPS for a 60 DMIPS/Watt.

Cache

Main article: ARM6 § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 4 KiB 4,096 B 0.00391 MiB     1x4 KiB 64-way set associative write-through

Documents

• VY86C710/VY86C610 Product Brief