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From WikiChip
MN-Core - Preferred Networks
| Edit Values | |
| MN-Core µarch | |
| General Info | |
| Arch Type | NPU |
| Designer | Preferred Networks |
| Manufacturer | TSMC |
| Introduction | 2020 |
| Process | 12 nm |
| PE Configs | 512 |
MN-Core is a neural processor microarchitecture designed by Preferred Networks for its own series of supercomputers.
Retrieved from "https://en.wikichip.org/w/index.php?title=preferred_networks/microarchitectures/mn-core&oldid=94603"
Facts about "MN-Core - Preferred Networks"
| codename | MN-Core + |
| designer | Preferred Networks + |
| first launched | 2020 + |
| full page name | preferred networks/microarchitectures/mn-core + |
| instance of | microarchitecture + |
| manufacturer | TSMC + |
| name | MN-Core + |
| process | 12 nm (0.012 μm, 1.2e-5 mm) + |
| processing element count | 512 + |