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Celeron 807 - Intel
| Edit Values | |||||||||
| Celeron 807 | |||||||||
| General Info | |||||||||
| Designer | Intel | ||||||||
| Manufacturer | Intel | ||||||||
| Model Number | 807 | ||||||||
| Part Number | AV8062701079702, AV8062701079700S, AV8062701345600 | ||||||||
| S-Spec | SR0PW, SR07G, SR0VL | ||||||||
| Market | Mobile | ||||||||
| Introduction | July, 2012 (announced) July, 2012 (launched) | ||||||||
| End-of-life | November 22, 2013 (last order) May 9, 2014 (last shipment) | ||||||||
| Release Price | $86.00 | ||||||||
| Shop | Amazon | ||||||||
| General Specs | |||||||||
| Family | Celeron | ||||||||
| Series | 800 | ||||||||
| Locked | Yes | ||||||||
| Frequency | 1,500 MHz | ||||||||
| Bus type | DMI 2.0 | ||||||||
| Bus rate | 4 × 5 GT/s | ||||||||
| Clock multiplier | 15 | ||||||||
| CPUID | 0x206A7 | ||||||||
| Microarchitecture | |||||||||
| ISA | x86-64 (x86) | ||||||||
| Microarchitecture | Sandy Bridge | ||||||||
| Platform | Sandy Bridge M | ||||||||
| Chipset | Cougar Point | ||||||||
| Core Name | Sandy Bridge M | ||||||||
| Core Family | 6 | ||||||||
| Core Model | 42 | ||||||||
| Core Stepping | J1, Q0 | ||||||||
| Process | 32 nm | ||||||||
| Transistors | 504,000,000 | ||||||||
| Technology | CMOS | ||||||||
| Die | 131 mm² | ||||||||
| Word Size | 64 bit | ||||||||
| Cores | 1 | ||||||||
| Threads | 2 | ||||||||
| Max Memory | 16 GiB | ||||||||
| Multiprocessing | |||||||||
| Max SMP | 1-Way (Uniprocessor) | ||||||||
| Electrical | |||||||||
| Power (idle) | 2.3 W | ||||||||
| Vcore | 0.3 V-1.52 V | ||||||||
| TDP | 17 W | ||||||||
| Tjunction | 0 °C – 100 °C | ||||||||
| Tstorage | -25 °C – 125 °C | ||||||||
| Packaging | |||||||||
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Celeron 807 is a single-core budget mobile x86 microprocessor introduced by Intel in mid-2012. The Celeron 807, which is based on the Sandy Bridge microarchitecture and is manufactured on a 32 nm process, operates at 1.5 GHz with a TDP of 17 W. This chip incorporates Intel's HD Graphics integrated graphics operating at 350 MHz with a burst frequency of 950 MHz. This processor supports 16 GiB of dual-channel DDR3-1333 memory.
Contents
Cache[edit]
- Main article: Sandy Bridge § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
Expansion Options |
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Graphics[edit]
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Integrated Graphics Information
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| [Edit] Sandy Bridge (Gen6) Hardware Accelerated Video Capabilities | |||||||
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| Codec | Encode | Decode | |||||
| Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
| MPEG-2 (H.262) | ✘ | Main | Main, High | Up to 80 Mbps | |||
| MPEG-4 AVC (H.264) | Main | 4.1 | Up to 40 Mbps | Main, High | 4.1 | Up to 40 Mbps | |
| VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | Up to 40 Mbps | |||
Features[edit]
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Documents[edit]
Datasheet[edit]
Other[edit]
Facts about "Celeron 807 - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Celeron 807 - Intel#package + and Celeron 807 - Intel#pcie + |
| base frequency | 1,500 MHz (1.5 GHz, 1,500,000 kHz) + |
| bus links | 4 + |
| bus rate | 5,000 MT/s (5 GT/s, 5,000,000 kT/s) + |
| bus type | DMI 2.0 + |
| chipset | Cougar Point + |
| clock multiplier | 15 + |
| core count | 1 + |
| core family | 6 + |
| core model | 42 + |
| core name | Sandy Bridge M + |
| core stepping | J1 + and Q0 + |
| core voltage (max) | 1.52 V (15.2 dV, 152 cV, 1,520 mV) + |
| core voltage (min) | 0.3 V (3 dV, 30 cV, 300 mV) + |
| cpuid | 0x206A7 + |
| designer | Intel + |
| device id | 0x0106 + |
| die area | 131 mm² (0.203 in², 1.31 cm², 131,000,000 µm²) + |
| family | Celeron + |
| first announced | July 2012 + |
| first launched | July 2012 + |
| full page name | intel/celeron/807 + |
| has ecc memory support | false + |
| has feature | Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Intel VT-x + and Flex Memory Access + |
| has intel enhanced speedstep technology | true + |
| has intel flex memory access support | true + |
| has intel vt-x technology | true + |
| has locked clock multiplier | true + |
| has simultaneous multithreading | true + |
| instance of | microprocessor + |
| integrated gpu | HD Graphics (Sandy Bridge) + |
| integrated gpu base frequency | 350 MHz (0.35 GHz, 350,000 KHz) + |
| integrated gpu designer | Intel + |
| integrated gpu execution units | 6 + |
| integrated gpu max frequency | 950 MHz (0.95 GHz, 950,000 KHz) + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) + |
| l3$ description | 12-way set associative + |
| l3$ size | 1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) + |
| last order | November 22, 2013 + |
| last shipment | May 9, 2014 + |
| ldate | July 2012 + |
| manufacturer | Intel + |
| market segment | Mobile + |
| max cpu count | 1 + |
| max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
| max memory | 16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) + |
| max memory bandwidth | 19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) + |
| max memory channels | 2 + |
| max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
| microarchitecture | Sandy Bridge + |
| min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
| model number | 807 + |
| name | Celeron 807 + |
| package | FCBGA-1023 + |
| part number | AV8062701079702 +, AV8062701079700S + and AV8062701345600 + |
| platform | Sandy Bridge M + |
| power dissipation (idle) | 2.3 W (2,300 mW, 0.00308 hp, 0.0023 kW) + |
| process | 32 nm (0.032 μm, 3.2e-5 mm) + |
| release price | $ 86.00 (€ 77.40, £ 69.66, ¥ 8,886.38) + |
| s-spec | SR0PW +, SR07G + and SR0VL + |
| series | 800 + |
| smp max ways | 1 + |
| supported memory type | DDR3-1333 + and DDR3-1066 + |
| tdp | 17 W (17,000 mW, 0.0228 hp, 0.017 kW) + |
| technology | CMOS + |
| thread count | 2 + |
| transistor count | 504,000,000 + |
| word size | 64 bit (8 octets, 16 nibbles) + |