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- 07:31, 3 September 2016 (diff | hist) . . (+287) . . Talk:10 nm lithography process (→What is the source for interconnect and gate pitches?: new section)
- 07:27, 3 September 2016 (diff | hist) . . (0) . . 10 nm lithography process (→Gate pitch (and scaling) changed from 55 to 54nm according to http://www.eetimes.com/document.asp?doc_id=1330311)
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