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Rock Creek - Microarchitectures - Intel
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Edit Values
Rock Creek µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
IntroductionDecember 2009
Process45 nm
Core Configs48
Instructions
ISAx86
Cache
L1I Cache16 KiB/core
4-way set associative
L1D Cache16 KiB/core
4-way set associative
L2 Cache256 KiB/core
4-way set associative
L3 Cache16 KiB/tile
Succession

Rock Creek or the Single-Chip Cloud Computer (SCC) was the successor to Polaris, a 45 nm many-core microarchitecture designed by intel for high performance computing and many-core software research. The SCC, like Polaris, was a research project from Intel's Tera-scale Computing Research Program.

Architecture[edit]

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Overview[edit]

SCC Chip
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Rock Lake[edit]

rock lake platform.png


rock lake platform board.jpg

Die[edit]

  • 45 nm process
  • 1 poly, 9 Metal (Cu)
  • 1,300,000,000 transistors
  • 26.5 mm x 21.4 mm
    • 567.1 mm² die size
  • 1,567 pins LGA packages
    • 970 signal pins


rock creek die 2.png


rock creek die.png


rock creek die 3.png


rock creek die (annotated).png

Tile[edit]

  • 48,000,000 transistors
  • 3.6 mm x 5.2 mm
    • 18.7 mm² silicon area


rock creek tile 2.png


rock creek tile 3.png


rock creek tile (annotated).png

Additional Shots[edit]

Additional die and wafer shots provided by Intel:

Bibliography[edit]

Documents[edit]

codenameRock Creek +
core count48 +
designerIntel +
first launchedDecember 2009 +
full page nameintel/microarchitectures/rock creek +
instance ofmicroarchitecture +
instruction set architecturex86 +
manufacturerIntel +
microarchitecture typeCPU +
nameRock Creek +
process45 nm (0.045 μm, 4.5e-5 mm) +