Semiconductor & Computer Engineering
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QorIQ P1015 - Freescale
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| QorIQ P1015 | |||||||||
| General Info | |||||||||
| Designer | Freescale | ||||||||
| Manufacturer | IBM | ||||||||
| Model Number | P1015 | ||||||||
| Market | Networking, Embedded | ||||||||
| Introduction | October, 2011 (announced) 2012 (launched) | ||||||||
| General Specs | |||||||||
| Family | QorIQ | ||||||||
| Series | P1 | ||||||||
| Frequency | 400 MHz, 533 MHz | ||||||||
| Microarchitecture | |||||||||
| ISA | Power ISA v2.03 (Power) | ||||||||
| Microarchitecture | e500 | ||||||||
| Core Name | e500 v2 | ||||||||
| Process | 45 nm | ||||||||
| Technology | CMOS | ||||||||
| Word Size | 32 bit | ||||||||
| Cores | 1 | ||||||||
| Threads | 1 | ||||||||
| Electrical | |||||||||
| Power dissipation | 1.4 W | ||||||||
| Packaging | |||||||||
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QorIQ P1015 is a 32-bit embedded POWER microprocessor introduced by Freescale in late 2011. This networking/embedded processor, which is based on the e500 microarchitecture and is fabricated on a 45 nm SOI process, operates at 400 MHz (with later higher frequency) and supports 32-bit DDR3-800 memory.
Cache[edit]
- Main article: e500 § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
- 3x 10/100/1000 Ethernet with 2x SGMII
- 2x PCIe controllers
- 2x USB 2.0
- SD/MMC
- SPI
- 2x I2C
- UART
Block Diagram[edit]
Facts about "QorIQ P1015 - Freescale"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | QorIQ P1015 - Freescale#package + |
| base frequency | 400 MHz (0.4 GHz, 400,000 kHz) + and 533 MHz (0.533 GHz, 533,000 kHz) + |
| core count | 1 + |
| core name | e500 v2 + |
| designer | Freescale + |
| family | QorIQ + |
| first announced | October 2011 + |
| first launched | 2012 + |
| full page name | freescale/qoriq/p1015 + |
| has ecc memory support | true + |
| instance of | microprocessor + |
| isa | Power ISA v2.03 + |
| isa family | Power + |
| l1$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) + |
| ldate | 2012 + |
| manufacturer | IBM + |
| market segment | Networking + and Embedded + |
| max memory bandwidth | 2.98 GiB/s (3,051.52 MiB/s, 3.2 GB/s, 3,199.751 MB/s, 0.00291 TiB/s, 0.0032 TB/s) + |
| max memory channels | 1 + |
| microarchitecture | e500 + |
| model number | P1015 + |
| name | QorIQ P1015 + |
| package | TE-PBGA-561 + |
| power dissipation | 1.4 W (1,400 mW, 0.00188 hp, 0.0014 kW) + |
| process | 45 nm (0.045 μm, 4.5e-5 mm) + |
| series | P1 + |
| supported memory type | DDR3-800 + |
| technology | CMOS + |
| thread count | 1 + |
| word size | 32 bit (4 octets, 8 nibbles) + |