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NNP-T 1300
NPU with 4 HBM2 stacks
General Info
Designer	Intel
Manufacturer	TSMC
Model Number	NNP-T 1300
Market	Server
Introduction	November 12, 2019 (announced) November 12, 2019 (launched)
Shop	Amazon
General Specs
Family	NNP
Series	NNP-T
Frequency	950 MHz
Microarchitecture
Microarchitecture	Spring Crest
Process	16 nm
Transistors	27,000,000,000
Technology	CMOS
Die	680 mm²
Cores	22
Max Memory	32 GiB
Multiprocessing
Interconnect	InterChip Link
Interconnect Links	16
Interconnect Rate	28 GT/s
Electrical
Power dissipation	150 W
TDP	300 W
Packaging
Package	FCBGA-3325 (FCBGA)
Dimension	60 mm × 60 mm
Contacts	3325

NNP-T 1300 is a training neural processor designed by Intel Nervana and introduced in late 2019. Fabricated on TSMC 16 nm process based on the Spring Crest microarchitecture, the NNP-T 1300 has 22 TPCs along with 55 MiB of scratchpad memory and operates at up to 950 MHz. This chip comes in a PCIe 4.0 accelerator card form factor and incorporates 32 GiB of HBM2 memory. This NPU exposes 16 inter-chip links for scale-out capabilities.

Peak Performance

The NNP-T 1300 has a peak performance of 93.39 TFLOPS

93,390,000,000,000 FLOPS
93,390,000,000 KFLOPS
93,390,000 MFLOPS
93,390 GFLOPS
0.0934 PFLOPS

(bfloat16).

Cache

Main article: Spring Crest § Cache

• 55 MiB of tightly-coupled scratchpad memory
  • 22 x 2.5 MiB/core

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type HBM2-2400 Supports ECC Yes Max Mem 32 GiB Controllers 4 Channels 32 Max Bandwidth 1.2288 TB/s 1,144.409 GiB/s 1,171,875 MiB/s 1,228.8 GB/s 1,228,800 MB/s 1.118 TiB/s

Interconnect Topology

The NNP-T 1300 comes in a dual-slot standard PCIe 4.0 card which enables support for only the ring topology. Chips are interconnected using the 16 available inter-chip links.

Die

Main article: Spring Crest § Die

• 27,000,000,000 transistors
• 680 mm² die size

Product Brief

• Intel NNP-T Product Brief