From WikiChip
Atom N270 - Intel
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Atom N270 | |||||||||
Atom N270 | |||||||||
General Info | |||||||||
Designer | Intel | ||||||||
Manufacturer | Intel | ||||||||
Model Number | N270 | ||||||||
Part Number | AU80586GE025D | ||||||||
S-Spec | SLB73 QDTD (QS), QDTB (QS), QGZT (QS) | ||||||||
Market | Mobile | ||||||||
Introduction | April 2, 2008 (announced) June 3, 2008 (launched) | ||||||||
Release Price | $44 | ||||||||
Shop | Amazon | ||||||||
General Specs | |||||||||
Family | Atom | ||||||||
Series | N200 | ||||||||
Locked | Yes | ||||||||
Frequency | 1,599.99 MHz | ||||||||
Bus type | FSB | ||||||||
Bus speed | 133.33 MHz | ||||||||
Bus rate | 533.33 MT/s | ||||||||
Clock multiplier | 12 | ||||||||
CPUID | 106C2 | ||||||||
Microarchitecture | |||||||||
ISA | x86-32 (x86) | ||||||||
Microarchitecture | Bonnell | ||||||||
Platform | Nettop 2008 | ||||||||
Chipset | Calistoga | ||||||||
Core Name | Diamondville | ||||||||
Core Family | 6 | ||||||||
Core Model | 112 | ||||||||
Core Stepping | C0 | ||||||||
Process | 45 nm | ||||||||
Transistors | 47,212,207 | ||||||||
Technology | CMOS | ||||||||
Die | 25.9638 mm² 7.94 mm × 3.27 mm | ||||||||
Word Size | 64 bit | ||||||||
Cores | 1 | ||||||||
Threads | 2 | ||||||||
Max Memory | 8 GiB | ||||||||
Multiprocessing | |||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||
Electrical | |||||||||
Vcore | 0.9 V-1.1625 V | ||||||||
VI/O | 1.1 V ± 0.05 V | ||||||||
TDP | 2.5 W | ||||||||
Tcase | 0 °C – 85.2 °C | ||||||||
Tstorage | -40 °C – 85 °C | ||||||||
Packaging | |||||||||
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Atom N270 is an ultra-low power 32-bit x86 single-core microprocessor introduced by Intel in mid-2008. The N270 is specifically designed for nettops and various other mobile internet connected devices. This processor, which was fabricated on Intel's 45 nm process, was based on the Bonnell microarchitecture. The Atom N270 operates at 1.6 GHz with a TDP of 2.5 W with an average power consumption of 600 mW. The MPU features a legacy 533 MT/s QDR front-side bus.
Cache[edit]
- Main article: Bonnell § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
This processor has no integrated memory controller.
Graphics[edit]
This processor has no integrated graphics.
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Documents[edit]
Datasheets[edit]
- Atom N270 Datasheet, May 2008
Other[edit]
- Atom N270 Specification Update, September 2008
Facts about "Atom N270 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Atom N270 - Intel#package + |
base frequency | 1,599.99 MHz (1.6 GHz, 1,599,990 kHz) + |
bus rate | 533.33 MT/s (0.533 GT/s, 533,330 kT/s) + |
bus speed | 133.33 MHz (0.133 GHz, 133,330 kHz) + |
bus type | FSB + |
chipset | Calistoga + |
clock multiplier | 12 + |
core count | 1 + |
core family | 6 + |
core model | 112 + |
core name | Diamondville + |
core stepping | C0 + |
core voltage (max) | 1.163 V (11.625 dV, 116.25 cV, 1,162.5 mV) + |
core voltage (min) | 0.9 V (9 dV, 90 cV, 900 mV) + |
cpuid | 106C2 + |
designer | Intel + |
die area | 25.964 mm² (0.0402 in², 0.26 cm², 25,963,800 µm²) + |
die length | 7.94 mm (0.794 cm, 0.313 in, 7,940 µm) + |
die width | 3.27 mm (0.327 cm, 0.129 in, 3,270 µm) + |
family | Atom + |
first announced | April 2, 2008 + |
first launched | June 3, 2008 + |
full page name | intel/atom/n270 + |
has feature | Hyper-Threading Technology + and Enhanced SpeedStep Technology + |
has intel enhanced speedstep technology | true + |
has locked clock multiplier | true + |
has simultaneous multithreading | true + |
instance of | microprocessor + |
io voltage | 1.1 V (11 dV, 110 cV, 1,100 mV) + |
io voltage tolerance | 0.05 V + |
isa | x86-32 + |
isa family | x86 + |
l1$ size | 56 KiB (57,344 B, 0.0547 MiB) + |
l1d$ description | 6-way set associative + |
l1d$ size | 24 KiB (24,576 B, 0.0234 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
ldate | 3000 + |
main image | + |
main image caption | Atom N270 + |
manufacturer | Intel + |
market segment | Mobile + |
max case temperature | 358.35 K (85.2 °C, 185.36 °F, 645.03 °R) + |
max cpu count | 1 + |
max memory | 8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) + |
max storage temperature | 358.15 K (85 °C, 185 °F, 644.67 °R) + |
microarchitecture | Bonnell + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 233.15 K (-40 °C, -40 °F, 419.67 °R) + |
model number | N270 + |
name | Atom N270 + |
package | FCBGA-437 + |
part number | AU80586GE025D + |
platform | Nettop 2008 + |
process | 45 nm (0.045 μm, 4.5e-5 mm) + |
release price | $ 44.00 (€ 39.60, £ 35.64, ¥ 4,546.52) + |
s-spec | SLB73 + |
s-spec (qs) | QDTD +, QDTB + and QGZT + |
series | N200 + |
smp max ways | 1 + |
socket | BGA-437 + |
tdp | 2.5 W (2,500 mW, 0.00335 hp, 0.0025 kW) + |
technology | CMOS + |
thread count | 2 + |
transistor count | 47,212,207 + |
word size | 64 bit (8 octets, 16 nibbles) + |