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Editing renesas/r-car/h1 (section)

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Facts about "R-Car H1 - Renesas"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
R-Car H1 - Renesas#package +
base frequency800 MHz (0.8 GHz, 800,000 kHz) + and 1,000 MHz (1 GHz, 1,000,000 kHz) +
core count5 +
core nameCortex-A9 + and SH-4A +
core voltage1.2 V (12 dV, 120 cV, 1,200 mV) +
designerRenesas + and ARM Holdings +
familyR-Car +
first announcedOctober 21, 2011 +
first launchedNovember 2011 +
full page namerenesas/r-car/h1 +
has ecc memory supportfalse +
instance ofmicroprocessor +
integrated gpuPowerVR SGX543 +
integrated gpu base frequency250 MHz (0.25 GHz, 250,000 KHz) +
integrated gpu designerImagination Technologies +
io voltage3.3 V (33 dV, 330 cV, 3,300 mV) +
isaARMv7 +
isa familyARM +
l1$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
l1d$ description4-way set associative +
l1d$ size0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
l1i$ description4-way set associative +
l1i$ size0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldateNovember 2011 +
main imageFile:r-car h1.png +
manufacturerTSMC +
market segmentEmbedded +
max cpu count1 +
max memory2,048 MiB (2,097,152 KiB, 2,147,483,648 B, 2 GiB, 0.00195 TiB) +
max memory bandwidth7.95 GiB/s (13.833 GB/s, 8,140.8 MiB/s, 0.00776 TiB/s, 0.00854 TB/s) +
max memory channels2 +
max pcie lanes1 +
microarchitectureCortex-A9 + and SH-4A +
model numberH1 +
nameR-Car H1 +
packageFCBGA-832 +
part numberR8A77790 +
process40 nm (0.04 μm, 4.0e-5 mm) +
series1st Gen +
supported memory typeDDR3-1066 +
technologyCMOS +
thread count5 +
word size32 bit (4 octets, 8 nibbles) +