From WikiChip
Editing mediatek/helio/mt6799
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Latest revision | Your text | ||
Line 1: | Line 1: | ||
− | {{mediatek title|Helio X30 | + | {{mediatek title|Helio X30}} |
− | {{ | + | {{mpu |
− | |name=MediaTek Helio X30 | + | | name = MediaTek Helio X30 |
− | |no image= | + | | no image = yes |
− | |designer=MediaTek | + | | image = |
− | |designer 2=ARM Holdings | + | | image size = |
− | |manufacturer=TSMC | + | | caption = |
− | |model number=Helio X30 | + | | designer = MediaTek |
− | |part number= | + | | designer 2 = ARM Holdings |
− | |market=Mobile | + | | manufacturer = TSMC |
− | |market 2=Embedded | + | | model number = Helio X30 |
− | |first announced=September 26, 2016 | + | | part number = |
− | |first launched=February 27, 2017 | + | | part number 2 = |
− | |family=Helio | + | | market = Mobile |
− | |series=Helio X | + | | market 2 = Embedded |
− | |frequency=2,500 MHz | + | | first announced = September 26, 2016 |
− | |frequency 2=2,200 MHz | + | | first launched = February 27, 2017 |
− | |frequency 3=1,900 MHz | + | | last order = |
− | |bus type=AMBA 4 AXI | + | | last shipment = |
− | | | + | | release price = |
− | |isa family=ARM | + | |
− | |microarch=Cortex-A53 | + | | family = Helio |
− | |microarch 2=Cortex-A73 | + | | series = Helio X |
− | |microarch 3=Cortex-A35 | + | | locked = |
− | |core name=Cortex-A35 | + | | frequency = 2,500 MHz |
− | |core name 2=Cortex-A53 | + | | frequency 2 = 2,200 MHz |
− | |core name 3=Cortex-A73 | + | | frequency 3 = 1,900 MHz |
− | |process=10 nm | + | | bus type = AMBA 4 AXI |
− | |technology=CMOS | + | | bus speed = |
− | |word size=64 bit | + | | bus rate = |
− | |core count=10 | + | | bus links = |
− | |thread count=10 | + | | clock multiplier = |
− | |max cpus=1 | + | |
− | |max memory= | + | | isa family = ARM |
+ | | isa = ARMv8 | ||
+ | | microarch = Cortex-A53 | ||
+ | | microarch 2 = Cortex-A73 | ||
+ | | microarch 3 = Cortex-A35 | ||
+ | | platform = | ||
+ | | chipset = | ||
+ | | core name = Cortex-A35 | ||
+ | | core name 2 = Cortex-A53 | ||
+ | | core name 3 = Cortex-A73 | ||
+ | | core family = | ||
+ | | core model = | ||
+ | | core stepping = | ||
+ | | process = 10 nm | ||
+ | | transistors = | ||
+ | | technology = CMOS | ||
+ | | die area = <!-- XX mm² --> | ||
+ | | die width = | ||
+ | | die length = | ||
+ | | word size = 64 bit | ||
+ | | core count = 10 | ||
+ | | thread count = 10 | ||
+ | | max cpus = 1 | ||
+ | | max memory = | ||
+ | |||
+ | | electrical = | ||
+ | | power = | ||
+ | | v core = | ||
+ | | v core tolerance = | ||
+ | | v io = | ||
+ | | v io 2 = | ||
+ | | v io 3 = | ||
+ | | sdp = | ||
+ | | tdp = | ||
+ | | tdp typical = | ||
+ | | ctdp down = | ||
+ | | ctdp down frequency = | ||
+ | | ctdp up = | ||
+ | | ctdp up frequency = | ||
+ | | temp min = | ||
+ | | temp max = | ||
+ | | tjunc min = | ||
+ | | tjunc max = | ||
+ | | tcase min = | ||
+ | | tcase max = | ||
+ | | tstorage min = <!-- °C --> | ||
+ | | tstorage max = | ||
+ | | tambient min = | ||
+ | | tambient max = | ||
+ | |||
+ | | packaging = | ||
+ | | package 0 = | ||
+ | | package 0 type = | ||
+ | | package 0 pins = | ||
+ | | package 0 pitch = | ||
+ | | package 0 width = | ||
+ | | package 0 length = | ||
+ | | package 0 height = | ||
}} | }} | ||
− | '''Helio X30''' | + | '''Helio X30''' is a {{arch|64}} [[deca-core]] [[ARM]] [[LTE]] system on a chip designed by [[MediaTek]] and launched in early [[2017]]. This SoC incorporates 3 independent clusters of cores (called "Tri-Cluster" by MediaTek) operating at varying degrees of performance designed for certain workloads (operating at 1.9 GHz, 2.2 GHz, and 2.5 GHz) and supports dual-channel LPDDR4-1866. This SoC also incorporates a {{imgtec|PowerVR GT7400 Plus}} [[IGP]] operating at 800 MHz. The chip has a modem supporting [[LTE]] User Equipment (UE) category 10. |
== Architecture == | == Architecture == | ||
Line 41: | Line 98: | ||
* Extreme Performance - 2x {{armh|Cortex-A73|l=arch}} @ 2.5 GHz | * Extreme Performance - 2x {{armh|Cortex-A73|l=arch}} @ 2.5 GHz | ||
* Performance/Power Balance - 4x {{armh|Cortex-A53|l=arch}} @ 2.2 GHz | * Performance/Power Balance - 4x {{armh|Cortex-A53|l=arch}} @ 2.2 GHz | ||
− | * Power Efficiency - 4x {{armh|Cortex-A35|l=arch}} @ 1. | + | * Power Efficiency - 4x {{armh|Cortex-A35|l=arch}} @ 1. GHz |
The three clusters are designed as a modified {{armh|big.LITTLE}} configuration. | The three clusters are designed as a modified {{armh|big.LITTLE}} configuration. | ||
Line 51: | Line 108: | ||
== Memory controller == | == Memory controller == | ||
{{memory controller | {{memory controller | ||
− | |type= | + | |type=LPDDR4-1866 |
|ecc=No | |ecc=No | ||
|max mem=8 GiB | |max mem=8 GiB | ||
|controllers=1 | |controllers=1 | ||
− | |channels= | + | |channels=2 |
− | |||
|max bandwidth=27.81 GiB/s | |max bandwidth=27.81 GiB/s | ||
− | |bandwidth schan | + | |bandwidth schan=13.9 GiB/s |
− | + | |bandwidth dchan=27.81 GiB/s | |
− | |bandwidth | ||
}} | }} | ||
Line 147: | Line 202: | ||
== Utilizing devices == | == Utilizing devices == | ||
− | * [[used by:: | + | <!-- |
− | + | * [[used by::xxxxxxxxxxxxxxxxxxxxxx]] | |
+ | --> | ||
{{expand list}} | {{expand list}} | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− |
Facts about "Helio X30 (MT6799) - MediaTek"