Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "intel/xeon silver/4116"
| Line 39: | Line 39: | ||
|package module 1={{packages/intel/fclga-3647}} | |package module 1={{packages/intel/fclga-3647}} | ||
}} | }} | ||
| + | '''Xeon Silver 4116''' is a {{arch|64}} [[dodeca-core]] [[x86]] dual-socket mid-range performance server microprocessor introduced by [[Intel]] in mid-2017. The Silver 4116, which is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process]], sports 1 {{x86|AVX-512}} [[FMA]] unit as well as two {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 2.1 GHz with a TDP of 85 W and a {{intel|turbo boost}} frequency of up to 3 GHz, supports up 768 GiB of hexa-channel DDR4-2400 ECC memory. | ||
Revision as of 17:30, 11 July 2017
Template:mpu Xeon Silver 4116 is a 64-bit dodeca-core x86 dual-socket mid-range performance server microprocessor introduced by Intel in mid-2017. The Silver 4116, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm process, sports 1 AVX-512 FMA unit as well as two Ultra Path Interconnect links. This microprocessor, which operates at 2.1 GHz with a TDP of 85 W and a turbo boost frequency of up to 3 GHz, supports up 768 GiB of hexa-channel DDR4-2400 ECC memory.
Facts about "Xeon Silver 4116 - Intel"
| l1$ size | 768 KiB (786,432 B, 0.75 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 384 KiB (393,216 B, 0.375 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 384 KiB (393,216 B, 0.375 MiB) + |
| l2$ description | 16-way set associative + |
| l2$ size | 12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) + |
| l3$ description | 11-way set associative + |
| l3$ size | 16.5 MiB (16,896 KiB, 17,301,504 B, 0.0161 GiB) + |
