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Difference between revisions of "intel/xeon platinum/8156"
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'''Xeon Platinum 8156''' is a {{arch|64}} [[quad-core]] [[x86]] multi-socket highest performance server microprocessor introduced by [[Intel]] in mid-2017. This chip supports up to 8-way multiprocessing. The Platinum 8156, which is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process|14 nm+ process]], sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 3.6 GHz with a TDP of 105 W and a {{intel|turbo boost}} frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.
 
'''Xeon Platinum 8156''' is a {{arch|64}} [[quad-core]] [[x86]] multi-socket highest performance server microprocessor introduced by [[Intel]] in mid-2017. This chip supports up to 8-way multiprocessing. The Platinum 8156, which is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process|14 nm+ process]], sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 3.6 GHz with a TDP of 105 W and a {{intel|turbo boost}} frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.
  
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== Features ==  
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== Cache ==
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{{x86 features
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{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
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|real=Yes
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The Xeon Platinum 8156 features a considerably larger non-default 16.5 MiB of [[L3]], a size that would normally be found on a 12-core part.
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|protected=Yes
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{{cache size
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|smm=Yes
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|l1 cache=256 KiB
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|fpu=Yes
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|l1i cache=128 KiB
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|x8616=Yes
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|l1i break=4x32 KiB
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|x8632=Yes
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|l1i desc=8-way set associative
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|x8664=Yes
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|l1d cache=128 KiB
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|nx=Yes
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|l1d break=4x32 KiB
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|mmx=Yes
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|l1d desc=8-way set associative
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|emmx=Yes
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|l1d policy=write-back
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|sse=Yes
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|l2 cache=4 MiB
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|sse2=Yes
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|l2 break=4x1 MiB
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|sse3=Yes
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|l2 desc=16-way set associative
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|ssse3=Yes
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|l2 policy=write-back
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|sse41=Yes
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|l3 cache=16.5 MiB
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|sse42=Yes
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|l3 break=12x1.375 MiB
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|sse4a=No
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|l3 desc=11-way set associative
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|avx=Yes
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|l3 policy=write-back
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|avx2=Yes
 
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|abm=Yes
 
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|tbm=No
 
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|bmi1=Yes
 
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|bmi2=Yes
 
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|fma3=Yes
 
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|fma4=No
 
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|aes=Yes
 
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|rdrand=Yes
 
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|sha=No
 
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|xop=No
 
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|adx=Yes
 
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|clmul=Yes
 
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|f16c=Yes
 
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|tbt1=No
 
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|tbt2=No
 
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|tbmt3=No
 
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|bpt=No
 
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|eist=Yes
 
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|sst=No
 
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|flex=No
 
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|fastmem=No
 
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|isrt=No
 
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|sba=No
 
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|mwt=No
 
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|sipp=No
 
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|att=No
 
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|ipt=No
 
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|tsx=Yes
 
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|txt=No
 
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|ht=Yes
 
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|vpro=Yes
 
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|vtx=Yes
 
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|vtd=Yes
 
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|ept=Yes
 
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|mpx=Yes
 
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|sgx=No
 
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|securekey=No
 
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|osguard=Yes
 
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|3dnow=No
 
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|e3dnow=No
 
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|smartmp=No
 
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|powernow=No
 
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|amdvi=No
 
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|amdv=No
 
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|rvi=No
 
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|smt=No
 
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|sensemi=No
 
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|xfr=No
 
 
}}
 
}}

Revision as of 04:13, 12 July 2017

Template:mpu Xeon Platinum 8156 is a 64-bit quad-core x86 multi-socket highest performance server microprocessor introduced by Intel in mid-2017. This chip supports up to 8-way multiprocessing. The Platinum 8156, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm+ process, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor, which operates at 3.6 GHz with a TDP of 105 W and a turbo boost frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.

Cache

Main article: Skylake § Cache

The Xeon Platinum 8156 features a considerably larger non-default 16.5 MiB of L3, a size that would normally be found on a 12-core part.

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  4x1 MiB16-way set associativewrite-back
L3$16.5 MiB
16,896 KiB
17,301,504 B
0.0161 GiB
  12x1.375 MiB11-way set associativewrite-back
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Facts about "Xeon Platinum 8156 - Intel"
RDF feed
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description16-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ description11-way set associative +
l3$ size16.5 MiB (16,896 KiB, 17,301,504 B, 0.0161 GiB) +