From WikiChip
Difference between revisions of "intel/platforms/menlow"
< intel

(Created page with "{{intel title|Menlow|platform}} {{platform | name = Menlow Platform | image = | image size = | caption = | image 2 = |...")
 
 
Line 31: Line 31:
 
}}
 
}}
 
'''Menlow''' is the platform name for [[Intel]]'s first generation low-power platform {{intel|Bonnell|l=arch}}-based processors and chipsets designed for [[Mobile Internet Devices]] (MID) and [[Ultra Mobile PCs]] (UMPCs). Menlow consists of a {{intel|Silverthorne|l=core}}-based processor and the {{intel|Poulsbo|l=chipset}} chipset.
 
'''Menlow''' is the platform name for [[Intel]]'s first generation low-power platform {{intel|Bonnell|l=arch}}-based processors and chipsets designed for [[Mobile Internet Devices]] (MID) and [[Ultra Mobile PCs]] (UMPCs). Menlow consists of a {{intel|Silverthorne|l=core}}-based processor and the {{intel|Poulsbo|l=chipset}} chipset.
 +
 +
== Documents ==
 +
* [[:File:Menlow Platform.pdf|Menlow Platform]]

Latest revision as of 21:52, 2 April 2017

Menlow Platform
Developer Intel
Manufacturer Intel
Introduction April 18, 2007 (announced)
April 2, 2008 (launch)
Process 45 nm
0.045 μm
4.5e-5 mm
, 0.13 μm
130 nm
1.3e-4 mm
Technology CMOS
Platform
Cores Silverthorne
Chipset Poulsbo
Succession
Moorestown

Menlow is the platform name for Intel's first generation low-power platform Bonnell-based processors and chipsets designed for Mobile Internet Devices (MID) and Ultra Mobile PCs (UMPCs). Menlow consists of a Silverthorne-based processor and the Poulsbo chipset.

Documents[edit]

chipsetPoulsbo +
core nameSilverthorne +
designerIntel +
first announcedApril 18, 2007 +
first launchedApril 2, 2008 +
instance ofplatform +
manufacturerIntel +
nameMenlow Platform +
process45 nm (0.045 μm, 4.5e-5 mm) + and 130 nm (0.13 μm, 1.3e-4 mm) +
technologyCMOS +