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Information for "intel/microarchitectures/sunny cove"
Basic information
Display title | Sunny Cove - Microarchitectures - Intel |
Default sort key | Sunny Cove, Intel |
Page length (in bytes) | 34,983 |
Page ID | 32256 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 3 |
Counted as a content page | Yes |
Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | David (talk | contribs) |
Date of page creation | 20:48, 20 December 2018 |
Latest editor | David (talk | contribs) |
Date of latest edit | 06:27, 17 February 2023 |
Total number of edits | 88 |
Total number of distinct authors | 19 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
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Transcluded templates (17) | Templates used on this page:
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Facts about "Sunny Cove - Microarchitectures - Intel"
codename | Sunny Cove + |
core count | 2 +, 4 +, 8 +, 10 +, 12 +, 16 +, 18 +, 20 +, 24 +, 26 +, 28 +, 32 +, 36 +, 38 + and 40 + |
designer | Intel + |
first launched | 2019 + |
full page name | intel/microarchitectures/sunny cove + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Sunny Cove + |
phase-out | 2021 + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |