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Difference between revisions of "intel/microarchitectures/spring hill"
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{{intel title|Spring Hill|l=arch}}
 
{{intel title|Spring Hill|l=arch}}
{{microarchitecture}}
+
{{microarchitecture
 +
|atype=NPU
 +
|name=Spring Hill
 +
|designer=Intel
 +
|manufacturer=Intel
 +
|introduction=May, 2019
 +
|process=10 nm
 +
|cores=2
 +
|processing elements=8
 +
|processing elements 2=10
 +
|processing elements 3=12
 +
|l3=3 MiB
 +
|l3 per=Slice
 +
}}
 
'''Spring Hill''' is a [[10 nm]] microarchitecture designed by [[Intel]] for their [[inference]] [[neural processors]]. Spring Hill was developed by the Israel Haifa Development Center (IDC).
 
'''Spring Hill''' is a [[10 nm]] microarchitecture designed by [[Intel]] for their [[inference]] [[neural processors]]. Spring Hill was developed by the Israel Haifa Development Center (IDC).
  

Revision as of 16:32, 15 October 2019

Edit Values
Spring Hill µarch
General Info
Arch TypeNPU
DesignerIntel
ManufacturerIntel
IntroductionMay, 2019
Process10 nm
Core Configs2
PE Configs8, 10, 12
Cache
L3 Cache3 MiB/Slice

Spring Hill is a 10 nm microarchitecture designed by Intel for their inference neural processors. Spring Hill was developed by the Israel Haifa Development Center (IDC).

Spring Hill-based products are branded as the NNP-I 1000 series.

Process technology

Spring Hill NPUs are fabricated on Intel's 10 nm process.

Architecture

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Block Diagram

SoC Overview

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Sunny Cove Core

See Sunny Cove § Block diagram.

Inference Engine (ICE)

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Memory Organization

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Overview

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Inference Engine (ICE)

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Board

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Die

codenameSpring Hill +
core count2 +
designerIntel +
first launchedMay 2019 +
full page nameintel/microarchitectures/spring hill +
instance ofmicroarchitecture +
manufacturerIntel +
nameSpring Hill +
process10 nm (0.01 μm, 1.0e-5 mm) +
processing element count8 +, 10 + and 12 +