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Information for "intel/microarchitectures/skylake (server)"
Basic information
Display title | intel/microarchitectures/skylake (server) |
Default sort key | intel/microarchitectures/skylake (server) |
Page length (in bytes) | 53,445 |
Page ID | 21291 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 4 |
Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | Nible (talk | contribs) |
Date of page creation | 08:58, 21 July 2017 |
Latest editor | David (talk | contribs) |
Date of latest edit | 23:05, 23 March 2020 |
Total number of edits | 118 |
Total number of distinct authors | 19 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
Facts about "Skylake (server) - Microarchitectures - Intel"
codename | Skylake (server) + |
core count | 4 +, 6 +, 8 +, 10 +, 12 +, 14 +, 16 +, 18 +, 20 +, 22 +, 24 +, 26 + and 28 + |
designer | Intel + |
first launched | May 4, 2017 + |
full page name | intel/microarchitectures/skylake (server) + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Skylake (server) + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |