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: [[File:skylake (quad-core) (annotated).png|650px]] | : [[File:skylake (quad-core) (annotated).png|650px]] | ||
+ | |||
+ | === Server Die === | ||
+ | [[File:intel xeon skylake sp.jpg|right|300px|thumb|Skylake SP chips and wafer.]] | ||
+ | Skylake Server class models and high-end desktop (HEDT) consist of 3 different dies: Low Core Count (LCC), High Core Count (HCC), and Extreme Core Count (XCC). | ||
+ | |||
+ | ==== Low Core Count (LCC) ==== | ||
+ | * [[14 nm process]] | ||
+ | * ? metal layers | ||
+ | * ~22.26 mm x ~14.62 mm | ||
+ | * ~325.44 mm² die size | ||
+ | * [[10 cores]] | ||
+ | |||
+ | ==== High Core Count (HCC) ==== | ||
+ | Die shot of the [[octadeca core]] HEDT {{intel|Skylake X|l=core}} processors. | ||
+ | |||
+ | * [[14 nm process]] | ||
+ | * ? metal layers | ||
+ | * ? mm² die size | ||
+ | * [[18 cores]] | ||
+ | |||
+ | |||
+ | : [[File:skylake (octadeca core).png|650px]] | ||
+ | |||
+ | {{future information}} | ||
+ | |||
+ | |||
+ | : [[File:skylake (octadeca core) (annotated).png|650px]] | ||
+ | |||
+ | ==== Extreme Core Count (XCC) ==== | ||
+ | * [[14 nm process]] | ||
+ | * ? metal layers | ||
+ | * ? mm² die size | ||
+ | * [[28 cores]] | ||
+ | |||
+ | : [[File:skylake-sp hcc die shot.png|650px]] | ||
+ | |||
+ | |||
+ | {{future information}} | ||
+ | |||
+ | |||
+ | : [[File:skylake-sp hcc die shot (annotated).png|650px]] | ||
== All Skylake Chips == | == All Skylake Chips == |
Facts about "Skylake (client) - Microarchitectures - Intel"
codename | Skylake (client) + |
core count | 2 + and 4 + |
designer | Intel + |
first launched | August 5, 2015 + |
full page name | intel/microarchitectures/skylake (client) + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Skylake (client) + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |