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From WikiChip
Raptor Lake - Microarchitectures - Intel
< intel | microarchitectures
| Edit Values | |
| Raptor Lake µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | September 27, 2022 |
| Process | Intel 7 |
| Core Configs | 24, 16, 8 |
| Pipeline | |
| OoOE | Yes |
| Speculative | Yes |
| Reg Renaming | Yes |
| Instructions | |
| ISA | x86-64 |
| Extensions | MMX, AVX, AVX2 |
| Cache | |
| L3 Cache | 3 MiB/Cluster |
| Succession | |
Raptor Lake (RPL) is Intel's successor to Alder Lake, an enhanced Intel 7-process based microarchitecture for mainstream workstations, desktops, and mobile devices. The microarchitecture was developed by Intel's R&D center (IDC) in Haifa, Israel.
For desktop and mobile, Alder Lake is branded as 13th Generation Intel Core i3, Core i5, Core i7, and Core i9 processors.
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/raptor_lake&oldid=100575"
Facts about "Raptor Lake - Microarchitectures - Intel"
| codename | Raptor Lake + |
| core count | 24 +, 16 + and 8 + |
| designer | Intel + |
| first launched | September 27, 2022 + |
| full page name | intel/microarchitectures/raptor lake + |
| instance of | microarchitecture + |
| instruction set architecture | x86-64 + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Raptor Lake + |
