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Information for "intel/microarchitectures/kaby lake"
Basic information
Display title | Kaby Lake - Microarchitectures - Intel |
Default sort key | Kaby Lake, Intel |
Page length (in bytes) | 39,204 |
Page ID | 6821 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 6 |
Counted as a content page | Yes |
Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | At32Hz (talk | contribs) |
Date of page creation | 00:09, 15 April 2016 |
Latest editor | 2607:fb91:be3:f5bb:5499:c2aa:e433:b564 (talk) |
Date of latest edit | 10:41, 8 April 2024 |
Total number of edits | 284 |
Total number of distinct authors | 27 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
Page properties
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Facts about "Kaby Lake - Microarchitectures - Intel"
codename | Kaby Lake + |
core count | 2 + and 4 + |
designer | Intel + |
first launched | August 30, 2016 + |
full page name | intel/microarchitectures/kaby lake + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Kaby Lake + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |