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Display titleCoffee Lake - Microarchitectures - Intel
Default sort keyCoffee Lake, Intel
Page length (in bytes)30,591
Page ID9887
Page content languageEnglish (en)
Page content modelwikitext
Indexing by robotsAllowed
Number of redirects to this page9
Counted as a content pageYes
Number of subpages of this page0 (0 redirects; 0 non-redirects)

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Page creatorDavid (talk | contribs)
Date of page creation12:09, 31 July 2016
Latest editorBerfs1 (talk | contribs)
Date of latest edit07:16, 7 December 2020
Total number of edits215
Total number of distinct authors40
Recent number of edits (within past 90 days)0
Recent number of distinct authors0

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codenameCoffee Lake +
core count2 +, 4 +, 6 + and 8 +
designerIntel +
first launchedOctober 5, 2017 +
full page nameintel/microarchitectures/coffee lake +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameCoffee Lake +
pipeline stages (max)19 +
pipeline stages (min)14 +
process14 nm (0.014 μm, 1.4e-5 mm) +