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{{intel title|4004}}
 
{{intel title|4004}}
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{{chip
+
{{mpu
−
|name=4004
+
| name               = Intel 4004
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|image=intel 4004 chip.jpg
+
| image               = C4004 (Intel).jpg
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|caption=4004 in CerDIP
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| caption             = Intel C4004, 4004 in CerDIP
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|designer=Intel
+
| manufacturer       = Intel
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|manufacturer=Intel
+
| model number       = 4004
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|model number=4004
+
| first announced     = November 15, 1971
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|part number=C4004
+
| first launched     = December, 1971
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|part number 2=D4004
+
| last order         = 1982
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|part number 3=P4004
+
| family             = MCS-4
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|market=Commercial
+
| frequency           = 500 kHz
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|market 2=Industrial
+
| frequency 2         = 740 kHz
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|first announced=November 15, 1971
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| microarch           = 4004
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|first launched=December, 1971
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| process             = 10 μm
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|last order=1982
+
| transistors         = 2,300
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|family=MCS-4
+
| technology         = pMOS
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|series=MCS
+
| die size            =  
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|frequency=500 kHz
+
| word size           = 4 bit
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|frequency 2=740 kHz
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| max memory addr     = 4 kB
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|isa=4004
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| electrical          = Yes
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|isa family=4004
+
| power               = 1 W
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|microarch=4004
+
| temp max           = 70 °C
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|chipset=4001
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| temp min           = 0 °C
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|chipset 2=4002
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| packaging           = Yes
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|chipset 3=4003
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| package             = CerDIP16
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|process=10 µm
+
| package type       = CerDIP
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|transistors=2,250
+
| package 1           = DIP16
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|technology=pMOS
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| package type 1     = DIP
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|die area=12 mm²
 
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|die length=4 mm
 
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|die width=3 mm
 
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|word size=4 bit
 
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|core count=1
 
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|thread count=1
 
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|max memory addr=4 kB
 
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|power=1 W
 
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|v core=15 V
 
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|v core tolerance=5%
 
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|tstorage min=-55 °C
 
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|tstorage max=125 °C
 
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|tambient min=0 °C
 
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|tambient max=70 °C
 
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|packaging=Yes
 
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|package 0=CerDIP-16
 
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|package 0 type=CerDIP
 
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|package 0 pins=16
 
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|package 0 pitch=2.54 mm
 
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|package 0 width=18.7 mm
 
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|package 0 length=7.5 mm
 
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|package 0 height=5.1 mm
 
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|package 1=DIP-16
 
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|package 1 type=DIP
 
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|package 1 pins=16
 
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|package 1 pitch=2.3 mm
 
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|package 1 width=18.9 mm
 
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|package 1 length=6.2 mm
 
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|package 1 height=5.1 mm
 
 
}}
 
}}
−
The '''Intel 4004''' was released by [[Intel Corporation]] in [[1971]] and was the first commercially available [[microprocessor]]. The 4004 was a [[4-bit architecture|4-bit CPU]], designed for use in the [[Busicom]] 141-PF printing calculator<ref>[http://www.intel.com/content/www/us/en/history/museum-story-of-intel-4004.html The Story of the Intel® 4004]</ref>. The chip, which is clocked at 740 KHz, employs a 10µm<ref>[https://web.archive.org/web/20131101060923/http://www.intel.com/Assets/PDF/DataSheet/4004_datasheet.pdf 4004 Datasheet]</ref> process silicon-gate, capable of executing 92,000 instructions per second. The chip was capable of accessing 4KB of [[program memory]] and 640 bytes of RAM. The 4004 was part of the [[Intel MCS-4]] system.
+
The '''Intel 4004''' was released by [[Intel Corporation]] in [[1971]] and was the first commercially available [[microprocessor]]. The 4004 was a [[4-bit architecture|4-bit CPU]], designed for use in the [[Busicom]] 141-PF printing calculator<ref>[http://www.intel.com/content/www/us/en/history/museum-story-of-intel-4004.html The Story of the Intel® 4004]</ref>. The chip, which is clocked at 740 KHz, employs a 10µm<ref>[http://www.intel.com/Assets/PDF/DataSheet/4004_datasheet.pdf 4004 Datasheet]</ref> process silicon-gate, capable of executing 92,000 instructions per second. The chip was capable of accessing 4KB of [[program memory]] and 640 bytes of RAM. The 4004 was part of the [[Intel MCS-4]] system.
  
 
The microprocessor had a limited architecture, such as: only a 3-levels deep [[stack]], a complex memory access scheme, and no [[interrupt]] support. In [[1974]] Intel released an enhanced version of the chip called the [[Intel 4040|4040]].
 
The microprocessor had a limited architecture, such as: only a 3-levels deep [[stack]], a complex memory access scheme, and no [[interrupt]] support. In [[1974]] Intel released an enhanced version of the chip called the [[Intel 4040|4040]].
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Three primary source variations were produced by Intel: C4004, D4004 and the P4004. The ''Intel C4004'' was the first chip to be manufactured; it had the gray traces visible on the white ceramic package itself. The C4004 was produced up until mid 1976, when production for the ''Intel D4004'' began. The D4004 had a plastic, black ceramic package. The ''Intel P4004'' is the plastic packaging version.
 
Three primary source variations were produced by Intel: C4004, D4004 and the P4004. The ''Intel C4004'' was the first chip to be manufactured; it had the gray traces visible on the white ceramic package itself. The C4004 was produced up until mid 1976, when production for the ''Intel D4004'' began. The D4004 had a plastic, black ceramic package. The ''Intel P4004'' is the plastic packaging version.
  
−
A couple of secondary sources exists, which has been developed by National Semiconductor and Hitachi since mid-1975. National Semiconductor produced two versions: ''INS4004J'' and ''INS4004D''. The ''INS4004J'' is a 16-pin black, ceramic DIP, while the ''INS4004D'' version is a 16-pin side-brazed, ceramic DIP. The other source was the {{hitachi|HD35404}} made by [[Hitachi]]. A third source was [[Microsystems International]] which actually manufactured an enhanced version of the chip since mid 1970 (also introduced in 1971).
+
A couple secondary sources exists, which has been developed by National Semiconductor and Hitachi since mid-1975. National Semiconductor produced two versions: ''INS4004J'' and ''INS4004D''. The ''INS4004J'' is a 16-pin black, ceramic DIP, while the ''INS4004D'' version is a 16-pin side-brazed, ceramic DIP. The other source was the {{hitachi|HD35404}} made by [[Hitachi]]. A third source was [[Microsystems International]] which actually manufactured an enhanced version of the chip since mid 1970 (also introduced in 1971).
  
 
{| class="wikitable"
 
{| class="wikitable"
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| 7 || Clock Phase 2
 
| 7 || Clock Phase 2
 
|-
 
|-
−
| 8 || Sync || ROM & RAM Sync || Synchronizes the ROM and RAM by signaling the clock is on the rising edge.
+
| 8 || Sync || ROM & RAM Sync || Synchronizes the ROM and RAM by signaling the clock is on the raising edge.
 
|-
 
|-
 
| 9 || Reset || Reset flag || A logic 1 clears all processor status registers and forces the program counter to jump to address 0x0. The RESET signal must be on for at least 64 clock cycles in order to take effect.
 
| 9 || Reset || Reset flag || A logic 1 clears all processor status registers and forces the program counter to jump to address 0x0. The RESET signal must be on for at least 64 clock cycles in order to take effect.
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| 12 || V<sub>DD</sub> || V<sub>SS</sub> -15±5% ||
 
| 12 || V<sub>DD</sub> || V<sub>SS</sub> -15±5% ||
 
|-
 
|-
−
| 13 || CM-RAM<sub>3</sub> || rowspan="4" | CM-RAM outputs || rowspan="4" | Bank selection signal for the [[Intel 4002|4002 RAM]] chips in the system.
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| 13 || CM-RAM<sub>3</sub> || rowspan="4" | CM-ROM outputs || rowspan="4" | Bank selection signal for the [[Intel 4002|4002 RAM]] chips in the system.
 
|-
 
|-
 
| 14 || CM-RAM<sub>2</sub>
 
| 14 || CM-RAM<sub>2</sub>
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* [[designer::Stan Mazor]]
 
* [[designer::Stan Mazor]]
 
* [[designer::Masatoshi Shim]]
 
* [[designer::Masatoshi Shim]]
−
 
−
== Die Shot ==
 
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* [[10 µm process]]
 
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* [[pMOS]] transistors
 
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* 2,250 transistors
 
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* 12 mm² die
 
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[[File:4004 die shot.png]]
 
  
 
== References ==
 
== References ==
 
{{reflist}}
 
{{reflist}}
 +
 +
{{DEFAULTSORT:4004}}

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Facts about "4004 - Intel"
RDF feed
base frequency0.5 MHz (5.0e-4 GHz, 500 kHz) + and 0.74 MHz (7.4e-4 GHz, 740 kHz) +
chipset4001 +, 4002 + and 4003 +
core count1 +
core voltage15 V (150 dV, 1,500 cV, 15,000 mV) +
core voltage tolerance5% +
designerTed Hoff +, Federico Faggin +, Stan Mazor +, Intel + and Masatoshi Shim +
die area12 mm² (0.0186 in², 0.12 cm², 12,000,000 µm²) +
die length4 mm (0.4 cm, 0.157 in, 4,000 µm) +
die width3 mm (0.3 cm, 0.118 in, 3,000 µm) +
familyMCS-4 +
first announcedNovember 15, 1971 +
first launchedDecember 1971 +
full page nameintel/mcs-4/4004 +
instance ofmicroprocessor +
isa4004 +
isa family4004 +
last order1982 +
ldateDecember 1971 +
main imageFile:intel 4004 chip.jpg +
main image caption4004 in CerDIP +
manufacturerIntel +
market segmentCommercial + and Industrial +
max ambient temperature343.15 K (70 °C, 158 °F, 617.67 °R) +
max memory address4 kB +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture4004 +
min ambient temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature218.15 K (-55 °C, -67 °F, 392.67 °R) +
model number4004 +
name4004 +
part numberC4004 +, P4004 + and D4004 +
power dissipation1 W (1,000 mW, 0.00134 hp, 0.001 kW) +
process10,000 nm (10 μm, 0.01 mm) +
seriesMCS +
technologypMOS +
thread count1 +
transistor count2,250 +
word size4 bit (0.5 octets, 1 nibbles) +