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Difference between revisions of "intel/core i7/i7-740qm"
< intel‎ | core i7

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| platform            = Calpella
 
| platform            = Calpella
 
| chipset            = Ibex Peak
 
| chipset            = Ibex Peak
| core name          = Clarksfield QC
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| core name          = Clarksfield
 
| core family        = 6
 
| core family        = 6
 
| core model          = 30
 
| core model          = 30
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| socket 0 type      = rPGA
 
| socket 0 type      = rPGA
 
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'''Core i7-820QM''' is a {{arch|64}} [[x86]] [[quad-core]] mobile performance microprocessor introduced by Intel late [[2010]]. The processor has a base frequency of 1.73 GHz with a turbo frequency of 2.93 GHz and a TDP of 45 W. This MPU is based on the {{intel|Clarksfield QC|l=core}} core ({{intel|Nehalem|l=arch microarchitecutre}}) and is manufactured on Intel's [[45 nm process]].
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'''Core i7-820QM''' is a {{arch|64}} [[x86]] [[quad-core]] mobile performance microprocessor introduced by Intel late [[2010]]. The processor has a base frequency of 1.73 GHz with a turbo frequency of 2.93 GHz and a TDP of 45 W. This MPU is based on the {{intel|Clarksfield|l=core}} core ({{intel|Nehalem|l=arch microarchitecutre}}) and is manufactured on Intel's [[45 nm process]].
  
 
== Cache ==
 
== Cache ==

Revision as of 17:49, 28 November 2016

Template:mpu Core i7-820QM is a 64-bit x86 quad-core mobile performance microprocessor introduced by Intel late 2010. The processor has a base frequency of 1.73 GHz with a turbo frequency of 2.93 GHz and a TDP of 45 W. This MPU is based on the Clarksfield core (Nehalem) and is manufactured on Intel's 45 nm process.

Cache

Main article: Nehalem § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB4-way set associativewrite-back
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back

L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB8-way set associativewrite-back

L3$6 MiB
6,144 KiB
6,291,456 B
0.00586 GiB
  4x1.5 MiB16-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1333
Supports ECCNo
Max Mem8 GiB
Controllers1
Channels2
Max Bandwidth19.87 GiB/s
20,346.88 MiB/s
21.335 GB/s
21,335.25 MB/s
0.0194 TiB/s
0.0213 TB/s
Bandwidth
Single 9.93 GiB/s
Double 19.87 GiB/s
Physical Address (PAE)36 bit

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision2.0
Max Lanes16
Configs1x16, 2x8


Features

[Edit/Modify Supported Features]

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Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 1.0Turbo Boost Technology 1.0
EISTEnhanced SpeedStep Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
Facts about "Core i7-740QM - Intel"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i7-740QM - Intel#io +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureHyper-Threading Technology +, Turbo Boost Technology 1.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d + and Extended Page Tables +
has intel enhanced speedstep technologytrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 1 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description4-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description8-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description16-way set associative +
l3$ size6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) +
max memory bandwidth19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) +
max memory channels2 +
max pcie lanes16 +
supported memory typeDDR3-1333 +