From WikiChip
Core i3-9300T - Intel
Template:mpu Core i3-9300T is a planned 64-bit mid-range performance x86 desktop processor by Intel set to be introduced in 2018. The i3-9300T is fabricated on Intel's 2nd generation 10nm+ process based on the Ice Lake microarchitecture.
32px | Leaked Info! Some of the information presented in this article is solely based on leaks that were published online or obtained directly by WikiChip. It goes without saying that this information could change, be incomplete, wrong, or even made up. It's highly advised to wait for an official product announcement. |
Cache
- Main article: Ice Lake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Facts about "Core i3-9300T - Intel"
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |