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Difference between revisions of "intel/atom/z560"
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'''Z560''' is an ultra-low power {{arch|32}} [[x86]] microprocessor introduced by [[Intel]] in mid-2010 specifically for Mobile Internet Devices (MID). The Z560, which is based on the {{intel|Bonnell|l=arch}} microarchitecture ({{intel|Silverthorne|l=core}} core), is manufactured on a [[45 nm process]]. This processor operates at 2.133 GHz with a TDP of 2.5 W. The MPU features a legacy 533 MT/s [[front-side bus]] capable of communicating with the {{intel|Poulsbo|l=chipset}} chipset in both low-power [[CMOS]] mode as well as normal [[GTL]] mode (which also works with other chipsets). | '''Z560''' is an ultra-low power {{arch|32}} [[x86]] microprocessor introduced by [[Intel]] in mid-2010 specifically for Mobile Internet Devices (MID). The Z560, which is based on the {{intel|Bonnell|l=arch}} microarchitecture ({{intel|Silverthorne|l=core}} core), is manufactured on a [[45 nm process]]. This processor operates at 2.133 GHz with a TDP of 2.5 W. The MPU features a legacy 533 MT/s [[front-side bus]] capable of communicating with the {{intel|Poulsbo|l=chipset}} chipset in both low-power [[CMOS]] mode as well as normal [[GTL]] mode (which also works with other chipsets). | ||
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| + | This processor has a TDP of 2.5 W when {{intel|Hyper-Threading}} is disabled and 2.75 W when enabled. | ||
Revision as of 19:45, 1 April 2017
Template:mpu Z560 is an ultra-low power 32-bit x86 microprocessor introduced by Intel in mid-2010 specifically for Mobile Internet Devices (MID). The Z560, which is based on the Bonnell microarchitecture (Silverthorne core), is manufactured on a 45 nm process. This processor operates at 2.133 GHz with a TDP of 2.5 W. The MPU features a legacy 533 MT/s front-side bus capable of communicating with the Poulsbo chipset in both low-power CMOS mode as well as normal GTL mode (which also works with other chipsets).
This processor has a TDP of 2.5 W when Hyper-Threading is disabled and 2.75 W when enabled.
