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== Models == | == Models == | ||
=== Bonnell === | === Bonnell === | ||
− | {{main|intel/microarchitectures/bonnell|l1= | + | {{main|intel/microarchitectures/bonnell|l1=Bonnel Microarchitecture}} |
− | '''Bonnell''' was the first microarchitecture designed specifically for the ultra-low power microprocessor market. Introduced in 2008, it featured fully [[x86]]-compatible cores with a TDP of only 500 mW to 2 W, less than any other x86 processor available | + | '''Bonnell''' was the first microarchitecture designed specifically for the ultra-low power microprocessor market. Introduced in 2008, it featured fully [[x86]]-compatible cores with a TDP of only 500 mW to 2 W, less than any other x86 processor available that the time. Bonnell's low-power came from its simplicity, being an [[in-order]] dual-issue piplined CPU. All Bonnell-based processors were manufactured on Intel's [[45 nm process]]. |
==== Silverthorne (MIDs, 1st Gen) ==== | ==== Silverthorne (MIDs, 1st Gen) ==== | ||
[[File:intel atom logo (2008-2009).png|right|100px]] | [[File:intel atom logo (2008-2009).png|right|100px]] | ||
− | {{ | + | {{main|intel/cores/silverthorne|l1=Silverthorne Core}} |
− | The first series of Bonnell processors were introduced during the [[2008]] Intel Developer Forum (IDF) in Shanghai, China. Those {{arch|32}} processors were based on the {{intel|Silverthorne|l=core}} core which were designed for the [[Mobile Internet Devices]] (MID) market. Silverthorne processors have 56 [[KiB]] of L1$ and 512 KiB of L2. Silverthorne has support for the traditional [[GTL|AGTL+]]-based [[FSB]] as well as a new low power [[CMOS]] FSB specifically introduced to reduce power. | + | The first series of Bonnell processors were introduced during the [[2008]] Intel Developer Forum (IDF) in Shanghai, China. Those {{arch|32}} processors were based on the the {{intel|Silverthorne|l=core}} core which were designed for the [[Mobile Internet Devices]] (MID) market. Silverthorne processors have 56 [[KiB]] of L1$ and 512 KiB of L2. Silverthorne has support for the traditional [[GTL|AGTL+]]-based [[FSB]] as well as a new low power [[CMOS]] FSB specifically introduced to reduce power. |
− | Silverthorne chips consist of 47 million [[transistors]] on a 24.2 mm² die. All processors are a [[single core]]. Additionally all models support every [[x86]] extension up to {{intel|SSSE3}} ({{intel|SMM}}, {{intel|FPU}}, {{intel|NX}}, {{intel|MMX}}, {{intel|SSE}}, {{intel|SSE2}}, {{intel|SSE3}}, {{intel|SSSE3}}). The original series of chips that were introduced in 2008 featured a tiny {{intel|FCBGA-437}} package measuring just 13 mm x 14 mm. Intel introduced | + | Silverthorne chips consist of 47 million [[transistors]] on a 24.2 mm² die. All processors are a [[single core]]. Additionally all models support every [[x86]] extension up to {{intel|SSSE3}} ({{intel|SMM}}, {{intel|FPU}}, {{intel|NX}}, {{intel|MMX}}, {{intel|SSE}}, {{intel|SSE2}}, {{intel|SSE3}}, {{intel|SSSE3}}). The original series of chips that were introduced in 2008 featured a tiny {{intel|FCBGA-437}} package measuring just 13 mm x 14 mm. Intel introduced an set of new models in a much bigger 22x22 mm² {{intel|FCBGA-441}} package. Models ending in ''P'' use those large packages. A couple of models (those ending with 'T') also support industrial temperature ranges. |
Silverthorne chips have an incredibly simple design featuring only the CPU itself on-die. The [[southbridge]] and [[northbridge]] are integrated on a secondary {{intel|Poulsbo|l=chipset}} chipset which features the [[memory controller]], an [[integrated graphics]], and the various [[I/O]] ports. | Silverthorne chips have an incredibly simple design featuring only the CPU itself on-die. The [[southbridge]] and [[northbridge]] are integrated on a secondary {{intel|Poulsbo|l=chipset}} chipset which features the [[memory controller]], an [[integrated graphics]], and the various [[I/O]] ports. | ||
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==== Lincroft (MIDs, 2nd Gen) ==== | ==== Lincroft (MIDs, 2nd Gen) ==== | ||
− | {{ | + | {{main|intel/cores/lincroft|l1=Lincroft Core}} |
Lincroft is the second generation {{intel|Bonnell|l=arch}}-based models, a successor to {{intel|Silverthorne|l=core}}. Lincroft is drastically different to Silverthorne. It's a complete [[system on a chip]] solution, incorporating most of the functionality of the chipset on-die, including the [[memory controller]], [[display controller]], and [[integrated graphics]]. Lincroft, along with the {{intel|Moorestown|l=platform}}, models were introduced on May 4, 2010. | Lincroft is the second generation {{intel|Bonnell|l=arch}}-based models, a successor to {{intel|Silverthorne|l=core}}. Lincroft is drastically different to Silverthorne. It's a complete [[system on a chip]] solution, incorporating most of the functionality of the chipset on-die, including the [[memory controller]], [[display controller]], and [[integrated graphics]]. Lincroft, along with the {{intel|Moorestown|l=platform}}, models were introduced on May 4, 2010. | ||
Lincroft SoCs where also fabricated on a [[45 nm process]] but incorporate a large part of the southbridge. For those reasons the die is considerably larger, 65.25 mm² incorporating 140,000,000 transistors. As with Silverthorne, all models support every [[x86]] extension up to {{intel|SSSE3}} ({{intel|SMM}}, {{intel|FPU}}, {{intel|NX}}, {{intel|MMX}}, {{intel|SSE}}, {{intel|SSE2}}, {{intel|SSE3}}, {{intel|SSSE3}}). Lincroft integrates the same [[Imagination Technologies]] {{imgtec|PowerVR}} {{imgtec|SGX 535}} [[IGP]] as Silverthorne but operating at double the frequency. Lincroft chips are packaged in an {{intel|FCBGA-518}}. | Lincroft SoCs where also fabricated on a [[45 nm process]] but incorporate a large part of the southbridge. For those reasons the die is considerably larger, 65.25 mm² incorporating 140,000,000 transistors. As with Silverthorne, all models support every [[x86]] extension up to {{intel|SSSE3}} ({{intel|SMM}}, {{intel|FPU}}, {{intel|NX}}, {{intel|MMX}}, {{intel|SSE}}, {{intel|SSE2}}, {{intel|SSE3}}, {{intel|SSSE3}}). Lincroft integrates the same [[Imagination Technologies]] {{imgtec|PowerVR}} {{imgtec|SGX 535}} [[IGP]] as Silverthorne but operating at double the frequency. Lincroft chips are packaged in an {{intel|FCBGA-518}}. | ||
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==== Diamondville (Nettops) ==== | ==== Diamondville (Nettops) ==== | ||
− | {{ | + | {{main|intel/cores/diamondville|l1=Diamondville Core}} |
Diamondville-based processors were introduced in mid-[[2008]]. Those [[single-core]] chips were designed for more complex devices such as light-weight notebooks and various nettops. One [[dual-core]] model was also introduced which featured two identical Diamondville in a single package. Diamondville processors have 56 [[KiB]] of L1$ and 512 KiB of L2 (twice as much for the dual-core variant). | Diamondville-based processors were introduced in mid-[[2008]]. Those [[single-core]] chips were designed for more complex devices such as light-weight notebooks and various nettops. One [[dual-core]] model was also introduced which featured two identical Diamondville in a single package. Diamondville processors have 56 [[KiB]] of L1$ and 512 KiB of L2 (twice as much for the dual-core variant). | ||
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}} | }} | ||
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Diamondville||Diamondville-SC||Diamondville-DC]]}} | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Diamondville||Diamondville-SC||Diamondville-DC]]}} | ||
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</table> | </table> | ||
{{comp table end}} | {{comp table end}} |
Facts about "Atom - Intel"
designer | Intel + |
first announced | March 2, 2008 + |
first launched | April 2, 2008 + |
full page name | intel/atom + |
instance of | system on a chip family + and microprocessor family + |
instruction set architecture | IA-32 + and x86-64 + |
main designer | Intel + |
manufacturer | Intel + |
microarchitecture | Bonnell + |
name | Intel Atom + |
package | FCBGA-437 + and PBGA-441 + |
process | 45 nm (0.045 μm, 4.5e-5 mm) +, 32 nm (0.032 μm, 3.2e-5 mm) +, 22 nm (0.022 μm, 2.2e-5 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | BGA + |
technology | CMOS + |
word size | 32 bit (4 octets, 8 nibbles) + and 64 bit (8 octets, 16 nibbles) + |