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| | {{intel title|Atom}} | | {{intel title|Atom}} |
| | {{ic family | | {{ic family |
| | + | | extended family = Yes |
| | | title = Intel Atom | | | title = Intel Atom |
| | | image = intel atom (2015).png | | | image = intel atom (2015).png |
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| | | developer = Intel | | | developer = Intel |
| | | manufacturer = Intel | | | manufacturer = Intel |
| − | | type = system on chips | + | | type = microprocessors |
| − | | type 2 = microprocessors
| |
| | | first announced = March 2, 2008 | | | first announced = March 2, 2008 |
| | | first launched = April 2, 2008 | | | first launched = April 2, 2008 |
| | | isa = IA-32 | | | isa = IA-32 |
| | | isa 2 = x86-64 | | | isa 2 = x86-64 |
| − | | microarch = Bonnell
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| − | | microarch 2 =
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| − | | microarch 3 =
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| | | word = 32 | | | word = 32 |
| | | word 2 = 64 | | | word 2 = 64 |
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| | | clock min = 500 MHz | | | clock min = 500 MHz |
| | | clock max = 2400 MHz | | | clock max = 2400 MHz |
| − | | package = FCBGA-437
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| − | | package 2 = PBGA-441
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| | | socket = BGA | | | socket = BGA |
| | }} | | }} |
| − | '''Atom''' is an family of [[ultra-low-voltage microprocessor|ultra-low-voltage]] {{arch|32|32}} and {{arch|64}} [[microprocessor]]s and [[system on chip]]s designed by [[Intel]] since 2008. | + | '''Atom''' is an extended family of [[ultra-low-voltage microprocessor|ultra-low-voltage]] {{arch|32|32}} and {{arch|64}} [[microprocessor]]s designed by [[Intel]]. Atom cores are also incorporated into various Atom [[system on a chip|SoC]]. |
| | | | |
| − | == Models == | + | == Families == |
| − | === Bonnell ===
| + | Atom CPUs exist as actual microprocessors as well as part of [[system on a chip]]. |
| − | {{main|intel/microarchitectures/bonnell|l1=Bonnell Microarchitecture}}
| |
| − | '''Bonnell''' was the first microarchitecture designed specifically for the ultra-low power microprocessor market. Introduced in 2008, it featured fully [[x86]]-compatible cores with a TDP of only 500 mW to 2 W, less than any other x86 processor available at the time. Bonnell's low-power came from its simplicity, being an [[in-order]] dual-issue pipelined CPU. All Bonnell-based processors were manufactured on Intel's [[45 nm process]].
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| − | | |
| − | ==== Silverthorne (MIDs, 1st Gen) ====
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| − | [[File:intel atom logo (2008-2009).png|right|100px]]
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| − | {{see also|intel/cores/silverthorne|l1=Silverthorne Core}}
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| − | The first series of Bonnell processors were introduced during the [[2008]] Intel Developer Forum (IDF) in Shanghai, China. Those {{arch|32}} processors were based on the {{intel|Silverthorne|l=core}} core which were designed for the [[Mobile Internet Devices]] (MID) market. Silverthorne processors have 56 [[KiB]] of L1$ and 512 KiB of L2. Silverthorne has support for the traditional [[GTL|AGTL+]]-based [[FSB]] as well as a new low power [[CMOS]] FSB specifically introduced to reduce power.
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| − | | |
| − | Silverthorne chips consist of 47 million [[transistors]] on a 24.2 mm² die. All processors are a [[single core]]. Additionally all models support every [[x86]] extension up to {{intel|SSSE3}} ({{intel|SMM}}, {{intel|FPU}}, {{intel|NX}}, {{intel|MMX}}, {{intel|SSE}}, {{intel|SSE2}}, {{intel|SSE3}}, {{intel|SSSE3}}). The original series of chips that were introduced in 2008 featured a tiny {{intel|FCBGA-437}} package measuring just 13 mm x 14 mm. Intel introduced a set of new models in a much bigger 22x22 mm² {{intel|FCBGA-441}} package. Models ending in ''P'' use those large packages. A couple of models (those ending with 'T') also support industrial temperature ranges.
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| − | | |
| − | Silverthorne chips have an incredibly simple design featuring only the CPU itself on-die. The [[southbridge]] and [[northbridge]] are integrated on a secondary {{intel|Poulsbo|l=chipset}} chipset which features the [[memory controller]], an [[integrated graphics]], and the various [[I/O]] ports.
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| − | <!-- NOTE:
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| − | This table is generated automatically from the data in the actual articles.
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| − | If a microprocessor is missing from the list, an appropriate article for it needs to be
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| − | created and tagged accordingly.
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| − | | |
| − | Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
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| − | -->
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| − | {{comp table start}}
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| − | <table class="comptable sortable tc13 tc14 tc15 tc16 tc17 tc18 tc19 tc20 tc21 tc22">
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| − | <tr class="comptable-header"><th> </th><th colspan="20">List of Silverthorne-based Atom Processors</th></tr>
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| − | <tr class="comptable-header"><th> </th><th colspan="8">Main processor</th><th colspan="2">Bus</th><th colspan="3">Features</th></tr>
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| − | {{comp table header 1|cols=Price, Process, Launched, C, T, Freq, TDP, SDP, Speed, Rate, Package, {{intel|Hyper-Threading|HT}}, VT-x}}
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| − | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Atom]] [[core name::Silverthorne]]
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| − | |?full page name
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| − | |?model number
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| − | |?release price
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| − | |?process
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| − | |?first launched
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| − | |?core count
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| − | |?thread count
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| − | |?base frequency#GHz
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| − | |?tdp#mW
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| − | |?sdp#mW
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| − | |?bus speed
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| − | |?bus rate
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| − | |?package
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| − | |?has simultaneous multithreading
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| − | |?has intel vt-x technology
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| − | |format=template
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| − | |template=proc table 3
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| − | |userparam=15:14
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| − | |mainlabel=-
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| − | }}
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| − | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Atom]] [[core name::Silverthorne]]}}
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| − | </table>
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| − | {{comp table end}}
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| − | | |
| − | ==== Lincroft (MIDs, 2nd Gen) ====
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| − | {{see also|intel/cores/lincroft|l1=Lincroft Core}}
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| − | Lincroft is the second generation {{intel|Bonnell|l=arch}}-based models, a successor to {{intel|Silverthorne|l=core}}. Lincroft is drastically different to Silverthorne. It's a complete [[system on a chip]] solution, incorporating most of the functionality of the chipset on-die, including the [[memory controller]], [[display controller]], and [[integrated graphics]]. Lincroft, along with the {{intel|Moorestown|l=platform}}, models were introduced on May 4, 2010.
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| − | | |
| − | Lincroft SoCs where also fabricated on a [[45 nm process]] but incorporate a large part of the southbridge. For those reasons the die is considerably larger, 65.25 mm² incorporating 140,000,000 transistors. As with Silverthorne, all models support every [[x86]] extension up to {{intel|SSSE3}} ({{intel|SMM}}, {{intel|FPU}}, {{intel|NX}}, {{intel|MMX}}, {{intel|SSE}}, {{intel|SSE2}}, {{intel|SSE3}}, {{intel|SSSE3}}). Lincroft integrates the same [[Imagination Technologies]] {{imgtec|PowerVR}} {{imgtec|SGX 535}} [[IGP]] as Silverthorne but operating at double the frequency. Lincroft chips are packaged in an {{intel|FCBGA-518}}.
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| − | | |
| − | In mid-2011 Intel introduce a number of new chips, as part of the {{intel|Oak Trail}} platform, utilizing the SM35 Express chipset.
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| − | | |
| − | <!-- NOTE:
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| − | This table is generated automatically from the data in the actual articles.
| |
| − | If a microprocessor is missing from the list, an appropriate article for it needs to be
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| − | created and tagged accordingly.
| |
| − | | |
| − | Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
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| − | -->
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| − | {{comp table start}}
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| − | <table class="comptable sortable tc13 tc14 tc15 tc16 tc17 tc18 tc19 tc20 tc21 tc22">
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| − | <tr class="comptable-header"><th> </th><th colspan="20">List of Lincroft-based Atom Processors</th></tr>
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| − | <tr class="comptable-header"><th> </th><th colspan="9">Main processor</th><th colspan="2">Memory</th><th colspan="2">[[IGP]]</th><th colspan="3">Features</th></tr>
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| − | {{comp table header 1|cols=Family, Price, Process, Launched, C, T, Freq, Burst, TDP, Type, Mem, Name, Frequency, Package, {{intel|Hyper-Threading|HT}}, Burst}}
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| − | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Lincroft]]
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| − | |?full page name
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| − | |?model number
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| − | |?microprocessor family
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| − | |?release price
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| − | |?process
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| − | |?first launched
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| − | |?core count
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| − | |?thread count
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| − | |?base frequency#MHz
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| − | |?turbo frequency (1 core)#GHz
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| − | |?tdp#mW
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| − | |?supported memory type
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| − | |?max memory#GiB
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| − | |?integrated gpu
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| − | |?integrated gpu base frequency
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| − | |?package
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| − | |?has simultaneous multithreading
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| − | |?has intel burst performance technology
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| − | |format=template
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| − | |template=proc table 3
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| − | |sort=model number
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| − | |userparam=18:17
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| − | |mainlabel=-
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| − | }}
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| − | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Lincroft]]}}
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| − | </table>
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| − | {{comp table end}}
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| − | | |
| − | ==== Diamondville (Nettops) ====
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| − | {{see also|intel/cores/diamondville|l1=Diamondville Core}}
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| − | Diamondville-based processors were introduced in mid-[[2008]]. Those [[single-core]] chips were designed for more complex devices such as light-weight notebooks and various nettops. One [[dual-core]] model was also introduced which featured two identical Diamondville in a single package. Diamondville processors have 56 [[KiB]] of L1$ and 512 KiB of L2 (twice as much for the dual-core variant).
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| − | | |
| − | Diamondville chips consist of 47 million [[transistors]] on a 25.96 mm² die. All processors are a [[single core]] (except for the {{\\|330}} which features two {{\\|230}} dies). Additionally all models support every [[x86]] extension up to {{intel|SSSE3}} ({{intel|SMM}}, {{intel|FPU}}, {{intel|NX}}, {{intel|MMX}}, {{intel|SSE}}, {{intel|SSE2}}, {{intel|SSE3}}, {{intel|SSSE3}}). These chips utilize the bigger 22x22 mm² {{intel|FCBGA-441}} package.
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| − | | |
| − | As with the Silverthorne chips, Diamondville models only incorporate the CPU therefore they must make use of the {{intel|Calistoga|l=chipset}} chipset for the [[memory controller]], [[integrated graphics]], and [[I/O]] functionality.
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| − | <!-- NOTE:
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| − | This table is generated automatically from the data in the actual articles.
| |
| − | If a microprocessor is missing from the list, an appropriate article for it needs to be
| |
| − | created and tagged accordingly.
| |
| − | | |
| − | Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
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| − | -->
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| − | {{comp table start}}
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| − | <table class="comptable sortable tc13 tc14 tc15 tc16 tc17 tc18 tc19 tc20 tc21 tc22">
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| − | <tr class="comptable-header"><th> </th><th colspan="20">List of Diamondville-based Atom Processors</th></tr>
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| − | <tr class="comptable-header"><th> </th><th colspan="8">Main processor</th><th colspan="2">Bus</th><th colspan="4">Features</th></tr>
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| − | {{comp table header 1|cols=Family, Price, Process, Launched, C, T, Freq, TDP, Speed, Rate, Package, ISA, EIST, {{intel|Hyper-Threading|HT}}}}
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| − | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Diamondville||Diamondville-SC||Diamondville-DC]]
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| − | |?full page name
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| − | |?model number
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| − | |?microprocessor family
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| − | |?release price
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| − | |?process
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| − | |?first launched
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| − | |?core count
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| − | |?thread count
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| − | |?base frequency#GHz
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| − | |?tdp#W
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| − | |?bus speed
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| − | |?bus rate
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| − | |?package
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| − | |?isa
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| − | |?has intel enhanced speedstep technology
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| − | |?has simultaneous multithreading
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| − | |format=template
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| − | |template=proc table 3
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| − | |userparam=16:15
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| − | |mainlabel=-
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| − | }}
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| − | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Diamondville||Diamondville-SC||Diamondville-DC]]}}
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| − | </table>
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| − | {{comp table end}}
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| − | === Silvermont ===
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| − | {{main|intel/microarchitectures/silvermont|l1=Silvermont Microarchitecture}}
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| − | Introduced in 2013, Silvermont-based processors are manufactured on a [[22 nm process]] and introduced OoOE to the Atom line of cores.
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| − | | |
| − | === Goldmont ===
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| − | {{main|intel/microarchitectures/goldmont|l1=Goldmont Microarchitecture}}
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| − | Introduced in late 2016, Goldmont-based processors which are manufactured on a [[14 nm process]] and provider considerable improvement in performance, power, and capabilities over its predecessors. Goldmont also doubled the highest count of integrated ultra-low power cores.
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| − | | |
| − | ==== Denverton (Servers) ====
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| − | [[File:atom c3000.png|right|200px]]
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| − | {{see also|intel/cores/denverton|l1=Denverton Core}}
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| − | Denverton-based chips are a complete [[system on a chip]] for dense ultra-low power servers, network devices, storage, and [[internet of things]] (IoT). Manufactured on a [[14 nm process]], those chips over up to double the cores as the previous generation as well as higher integration and more I/O capabilities. Models support up to dual-channel DDR4 ECC memory and either 128 GiB or 256 GiB of memory. All models support everything up to SSE4.2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES) as well as {{intel|VT-x}}, {{intel|VT-d}}, {{intel|EPT}}, and {{intel|Secure Boot}}. Models vary from [[2 cores]] up to [[16 cores]] and without {{intel|Hyper-Threading}} support. Those SoCs come with 6 to 20 High-Speed Input/Output (HSIO) lanes which are highly configurable lanes that allow their intended purpose (e.g., SATA, PCIe, USB) to be setup by the user in the BIOS. The exact amount of each that can be allocated is model-dependent. Additionally, each model have two to four dedicated integrated Ethernet adapters supporting up 10 GbE. Depending on the exact model, some also have integrated {{intel|QuickAssist Technology}} which offers the ability to off-load cryptography and compression tasks to a separate dedicated engine on-die.
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| − | | |
| − | <!-- NOTE:
| |
| − | This table is generated automatically from the data in the actual articles.
| |
| − | If a microprocessor is missing from the list, an appropriate article for it needs to be
| |
| − | created and tagged accordingly.
| |
| − | | |
| − | Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
| |
| − | -->
| |
| − | {{comp table start}}
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| − | <table class="comptable sortable tc6 tc7 tc8 tc15 tc16 tc17 tc18 tc19 tc20 tc21">
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| − | <tr class="comptable-header"><th> </th><th colspan="20">List of Denverton Processors</th></tr>
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| − | <tr class="comptable-header"><th> </th><th colspan="9">Main processor</th><th colspan="2">Cache</th><th colspan="2">Memory</th><th colspan="4">Configurable I/O</th><th colspan="3">Feature Diff</th></tr>
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| − | {{comp table header 1|cols=Price, Family, Process, Launched, Cores, Threads, %TDP, %Frequency, %Turbo, %L1, %L2, Memory Type, Max Mem, HS I/O, PCIe, USB, SATA, ECC, {{intel|Turbo Boost|TBT}}, {{intel|quickassist technology|QAT}}}}
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| − | <tr class="comptable-header comptable-header-sep"><th> </th><th colspan="20">Server and Cloud Storage SKUs</th></tr>
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| − | {{#ask: [[Category:microprocessor models by intel]] [[core name::Denverton]] [[part of::Server and Cloud Storage SKUs]]
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| − | |?full page name
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| − | |?model number
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| − | |?release price
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| − | |?microprocessor family
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| − | |?process
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| − | |?first launched
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| − | |?core count
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| − | |?thread count
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| − | |?tdp
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| − | |?base frequency
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| − | |?turbo frequency (1 core)
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| − | |?l1$ size#KiB
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| − | |?l2$ size
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| − | |?supported memory type
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| − | |?max memory#GiB
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| − | |?max hsio lanes
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| − | |?Has subobject.max pcie lanes
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| − | |?max usb ports
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| − | |?max sata ports
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| − | |?has ecc memory support
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| − | |?has intel turbo boost technology 2 0
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| − | |?has integrated intel quickassist technology
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| − | |format=template
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| − | |template=proc table 3
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| − | |userparam=22:20
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| − | |mainlabel=-
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| − | |valuesep=,
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| − | }}
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| − | <tr class="comptable-header comptable-header-sep"><th> </th><th colspan="20">Network and Enterprise Storage SKUs</th></tr>
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| − | {{#ask: [[Category:microprocessor models by intel]] [[core name::Denverton]] [[part of::Network and Enterprise Storage SKUs]]
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| − | |?full page name
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| − | |?model number
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| − | |?release price
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| − | |?microprocessor family
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| − | |?process
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| − | |?first launched
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| − | |?core count
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| − | |?thread count
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| − | |?tdp
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| − | |?base frequency
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| − | |?turbo frequency (1 core)
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| − | |?l1$ size#KiB
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| − | |?l2$ size
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| − | |?supported memory type
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| − | |?max memory#GiB
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| − | |?max hsio lanes
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| − | |?Has subobject.max pcie lanes
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| − | |?max usb ports
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| − | |?max sata ports
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| − | |?has ecc memory support
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| − | |?has intel turbo boost technology 2 0
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| − | |?has integrated intel quickassist technology
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| − | |format=template
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| − | |template=proc table 3
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| − | |userparam=22:20
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| − | |mainlabel=-
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| − | |valuesep=,
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| − | }}
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| − | <tr class="comptable-header comptable-header-sep"><th> </th><th colspan="20">Internet of Things and eTEMP SKUs</th></tr>
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| − | {{#ask: [[Category:microprocessor models by intel]] [[core name::Denverton]] [[part of::Internet of Things and eTEMP SKUs]]
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| − | |?full page name
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| − | |?model number
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| − | |?release price
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| − | |?microprocessor family
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| − | |?process
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| − | |?first launched
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| − | |?core count
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| − | |?thread count
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| − | |?tdp
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| − | |?base frequency
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| − | |?turbo frequency (1 core)
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| − | |?l1$ size#KiB
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| − | |?l2$ size
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| − | |?supported memory type
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| − | |?max memory#GiB
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| − | |?max hsio lanes
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| − | |?Has subobject.max pcie lanes
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| − | |?max usb ports
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| − | |?max sata ports
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| − | |?has ecc memory support
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| − | |?has intel turbo boost technology 2 0
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| − | |?has integrated intel quickassist technology
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| − | |format=template
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| − | |template=proc table 3
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| − | |userparam=22:20
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| − | |mainlabel=-
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| − | |valuesep=,
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| − | }}
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| − | {{comp table count|col=20|ask=[[Category:microprocessor models by intel]][[core name::Denverton]]}}
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| − | </table>
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| − | {{comp table end}}
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| − | | |
| − | <!--
| |
| | === Microprocessors === | | === Microprocessors === |
| | * {{intel|Atom 230|Atom 230 Series}}, 2008 | | * {{intel|Atom 230|Atom 230 Series}}, 2008 |
| Line 314: |
Line 48: |
| | === System on a chip === | | === System on a chip === |
| | * {{intel|Atom Z2000|Atom Z2000 Series}}, 2012 | | * {{intel|Atom Z2000|Atom Z2000 Series}}, 2012 |
| − | * {{intel|Atom Z3000|Atom Z3000 Series}}, 2013--> | + | * {{intel|Atom Z3000|Atom Z3000 Series}}, 2013 |
| | + | * {{intel|Atom x5|Atom x5 Series}}, 2015 |
| | + | * {{intel|Atom x7|Atom x7 Series}}, 2015 |
| | + | |
| | + | == Cores == |
| | + | {{empty section}} |
| | + | |
| | + | == Features == |
| | + | {{empty section}} |
| | | | |
| − | === SoCs ===
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| − | * {{intel|Atom x3}}, 2015
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| − | * {{intel|Atom x5}}, 2015
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| − | * {{intel|Atom x7}}, 2015
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| | | | |
| − | == Microarchitectures ==
| + | {{stub}} |
| − | {| class="wikitable" | |
| − | |-
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| − | ! T/T !! Process !! µarch !! Intro Date !! Cores
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| − | |-
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| − | | Tick || rowspan="2" | [[45 nm]] || rowspan="2" | {{intel|Bonnell}} || 2008 || {{intel|Silverthorne}}, {{intel|Diamondville}}
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| − | |-
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| − | | Tock || 2010 || {{intel|Lincroft}}, {{intel|Pineview}}, {{intel|Tunnel Creek}}, {{intel|Stellarton}}, {{intel|Sodaville}}, {{intel|Groveland}}
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| − | |-
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| − | | Tick || [[32 nm]] || {{intel|Saltwell}} || 2011 || {{intel|Clover Trail}}, {{intel|Cedar Trail}}
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| − | |-
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| − | | Tick || [[22 nm]] || {{intel|Silvermont}} || 2013 || {{intel|Bay Trail}}
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| − | |-
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| − | | Tock || rowspan="2" | [[14 nm]] || {{intel|Airmont}} ||2015 || {{intel|Cherry Trail}}, {{intel|Braswell}}
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| − | |-
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| − | | Tick || {{intel|Goldmont}} || 2016 ||
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| − | |}
| |
