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QorIQ P1024 - Freescale
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QorIQ P1024
qoriq p1024.png
General Info
Model NumberP1024
MarketNetworking, Embedded
IntroductionOctober, 2011 (announced)
2012 (launched)
General Specs
Frequency533 MHz
ISAPower ISA v2.03 (Power)
Core Namee500 v2
Process45 nm
Word Size32 bit
Power dissipation1.6 W
PackageTE-PBGA-561 (TE PBGA)
Temperature-Enhanced Plastic BGA
Dimension23 mm x 23 mm
Pitch0.8 mm

QorIQ P1024 is a 32-bit dual-core embedded POWER microprocessor introduced by Freescale in late 2011. This networking/embedded processor, which is based on the e500 microarchitecture and is fabricated on a 45 nm SOI process, operates at 400 MHz (with later higher frequency) and supports 32-bit DDR3-800 memory.


Main article: e500 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 

L2$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
  1x256 KiB8-way set associativeWrite-through

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-800
Supports ECCYes
Width32 bit
Max Bandwidth2.98 GiB/s
3,051.52 MiB/s
3.2 GB/s
3,199.751 MB/s
0.00291 TiB/s
0.0032 TB/s
Single 2.98 GiB/s


  • 3x 10/100/1000 Ethernet with 2x SGMII
  • 2x PCIe controllers
  • 2x USB 2.0
  • SD/MMC
  • SPI
  • 2x I2C
  • UART

Block Diagram

qoriq p1015 block diagram.png
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
QorIQ P1024 - Freescale#package +
base frequency533 MHz (0.533 GHz, 533,000 kHz) +
core count2 +
core namee500 v2 +
designerFreescale +
familyQorIQ +
first announcedOctober 2011 +
first launched2012 +
full page namefreescale/qoriq/p1024 +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaPower ISA v2.03 +
isa familyPower +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldate2012 +
main imageFile:qoriq p1024.png +
manufacturerIBM +
market segmentNetworking + and Embedded +
max memory bandwidth2.98 GiB/s (3,051.52 MiB/s, 3.2 GB/s, 3,199.751 MB/s, 0.00291 TiB/s, 0.0032 TB/s) +
max memory channels1 +
microarchitecturee500 +
model numberP1024 +
nameQorIQ P1024 +
packageTE-PBGA-561 +
power dissipation1.6 W (1,600 mW, 0.00215 hp, 0.0016 kW) +
process45 nm (0.045 μm, 4.5e-5 mm) +
seriesP1 +
supported memory typeDDR3-800 +
technologyCMOS +
thread count2 +
word size32 bit (4 octets, 8 nibbles) +