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Difference between revisions of "cray/microarchitectures/rosetta"

(Die)
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== Die ==
 
== Die ==
{{empty section}}
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* TSMC [[16 nm process]]
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* 64 port
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* 250 W
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* tiled architecture
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** 32  tile blocks
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** peripheral function blocks
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''floorplan:''
 +
 
 +
:[[File:cray rosetta die plot.jpg|600px]]
  
 
== Bibliography ==
 
== Bibliography ==
 
* {{bib|hoti|2019|Cray}}
 
* {{bib|hoti|2019|Cray}}

Revision as of 23:10, 7 February 2020

Edit Values
Rosetta µarch
General Info
Arch TypeSwitch
DesignerCray
ManufacturerTSMC
Introduction2019
Process16 nm

Rosetta is the microarchitecture for Cray's Slingshot ASIC Switch.

Process technology

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Overview

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Die

  • TSMC 16 nm process
  • 64 port
  • 250 W
  • tiled architecture
    • 32 tile blocks
    • peripheral function blocks

floorplan:

cray rosetta die plot.jpg

Bibliography

  • Cray, 2019 IEEE Symposium on High-Performance Interconnects (HOTI).
codenameRosetta +
designerCray +
first launched2019 +
full page namecray/microarchitectures/rosetta +
instance ofmicroarchitecture +
manufacturerTSMC +
nameRosetta +
process16 nm (0.016 μm, 1.6e-5 mm) +