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Difference between revisions of "compaq/microarchitectures/alpha 21464"
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| − | '''Alpha 21464''' was an ambitious [[Alpha]] microarchitecture designed by [[Compaq]] as a successor to the {{\\|Alpha 21364}}. The project was cancelled in June [[2001]] when Compaq announced their commitment to Intel's {{intel|Itanium}}. | + | '''Alpha 21464''' was an ambitious [[Alpha]] microarchitecture designed by [[Compaq]] as a successor to the {{\\|Alpha 21364}} set to be introduced in 2004. The project was cancelled in June [[2001]] when Compaq announced their commitment to Intel's {{intel|Itanium}}. |
| + | |||
| + | == History == | ||
| + | {{empty section}} | ||
| + | |||
| + | == Process Technology == | ||
| + | {{see also|0.13 µm process}} | ||
| + | {{empty section}} | ||
| + | |||
| + | == Architecture == | ||
| + | {{empty section}} | ||
| + | |||
| + | == Die == | ||
| + | * 1.2 GHz - 2 GHz @ ~1.2 V | ||
| + | * [[0.13 µm process]] | ||
| + | * ~250,000,000 transistors | ||
| + | * ~420 mm² die size | ||
| + | * PGA-??? package | ||
| + | ** ~1100 signal pins | ||
| + | |||
| + | Floorplan was done but the design never made it to fabrication. | ||
| + | |||
| + | : [[File:Alpha 21464 die floorplan.png|650px]] | ||
| + | |||
== References == | == References == | ||
* Seznec, André, et al. "Design tradeoffs for the Alpha EV8 conditional branch predictor." Computer Architecture, 2002. Proceedings. 29th Annual International Symposium on. IEEE, 2002. | * Seznec, André, et al. "Design tradeoffs for the Alpha EV8 conditional branch predictor." Computer Architecture, 2002. Proceedings. 29th Annual International Symposium on. IEEE, 2002. | ||
Revision as of 03:52, 12 June 2017
| Edit Values | |
| Alpha 21464 µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Compaq |
| Manufacturer | IBM |
| Process | 0.13 µm |
| Core Configs | 1 |
| Pipeline | |
| Type | Superscalar |
| OoOE | Yes |
| Speculative | Yes |
| Reg Renaming | Yes |
| Stages | 8 |
| Decode | 8-way |
| Instructions | |
| ISA | Alpha |
| Cache | |
| L1I Cache | 64 KiB/core 4-way set associative |
| L1D Cache | 64 KiB/core 4-way set associative |
| Succession | |
Alpha 21464 was an ambitious Alpha microarchitecture designed by Compaq as a successor to the Alpha 21364 set to be introduced in 2004. The project was cancelled in June 2001 when Compaq announced their commitment to Intel's Itanium.
History
 |
This section is empty; you can help add the missing info by editing this page. |
Process Technology
- See also: 0.13 µm process
| |
This section is empty; you can help add the missing info by editing this page. |
Architecture
| |
This section is empty; you can help add the missing info by editing this page. |
Die
- 1.2 GHz - 2 GHz @ ~1.2 V
- 0.13 µm process
- ~250,000,000 transistors
- ~420 mm² die size
- PGA-??? package
- ~1100 signal pins
Floorplan was done but the design never made it to fabrication.
References
- Seznec, André, et al. "Design tradeoffs for the Alpha EV8 conditional branch predictor." Computer Architecture, 2002. Proceedings. 29th Annual International Symposium on. IEEE, 2002.
Facts about "Alpha 21464 - Microarchitectures - Compaq"
| codename | Alpha 21464 + |
| core count | 1 + |
| designer | Compaq + |
| full page name | compaq/microarchitectures/alpha 21464 + |
| instance of | microarchitecture + |
| instruction set architecture | Alpha + |
| manufacturer | IBM + |
| microarchitecture type | CPU + |
| name | Alpha 21464 + |
| pipeline stages | 8 + |
| process | 130 nm (0.13 μm, 1.3e-4 mm) + |
