From WikiChip
Revision history of "cavium/thunderx2/cn9965"
View logs for this page

Diff selection: Mark the radio boxes of the revisions to compare and hit enter or the button at the bottom.
Legend: (cur) = difference with latest revision, (prev) = difference with preceding revision, m = minor edit.

Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
ThunderX2 CN9965 - Cavium#pcie +
base frequency1,800 MHz (1.8 GHz, 1,800,000 kHz) +, 2,000 MHz (2 GHz, 2,000,000 kHz) +, 2,100 MHz (2.1 GHz, 2,100,000 kHz) +, 2,200 MHz (2.2 GHz, 2,200,000 kHz) +, 2,300 MHz (2.3 GHz, 2,300,000 kHz) +, 2,400 MHz (2.4 GHz, 2,400,000 kHz) + and 2,500 MHz (2.5 GHz, 2,500,000 kHz) +
core count20 +
designerCavium +
familyThunderX2 +
first announcedMay 7, 2018 +
first launchedMay 7, 2018 +
full page namecavium/thunderx2/cn9965 +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaARMv8.1 +
isa familyARM +
l1$ size1,280 KiB (1,310,720 B, 1.25 MiB) +
l1d$ description8-way set associative +
l1d$ size640 KiB (655,360 B, 0.625 MiB) +
l1i$ description8-way set associative +
l1i$ size640 KiB (655,360 B, 0.625 MiB) +
l2$ description8-way set associative +
l2$ size5 MiB (5,120 KiB, 5,242,880 B, 0.00488 GiB) +
l3$ size20 MiB (20,480 KiB, 20,971,520 B, 0.0195 GiB) +
ldateMay 7, 2018 +
manufacturerTSMC +
market segmentServer +
max cpu count2 +
max memory2,097,152 MiB (2,147,483,648 KiB, 2,199,023,255,552 B, 2,048 GiB, 2 TiB) +
max memory bandwidth119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) +
max memory channels6 +
max sata ports2 +
max usb ports2 +
microarchitectureVulcan +
model numberCN9965 +
nameThunderX2 CN9965 +
packageFCLGA-4077 +
part numberCN9965-2500LG4077-Y21-G +, CN9965-2400LG4077-Y21-G +, CN9965-2300LG4077-Y21-G +, CN9965-2200LG4077-Y21-G +, CN9965-2100LG4077-Y21-G +, CN9965-2000LG4077-Y21-G + and CN9965-1800LG4077-Y21-G +
process16 nm (0.016 μm, 1.6e-5 mm) +
smp max ways2 +
supported memory typeDDR4-2666 +
technologyCMOS +
thread count40 +
word size64 bit (8 octets, 16 nibbles) +