Semiconductor & Computer Engineering
-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Difference between revisions of "bitmain/sophon"
< bitmain
(sophon) |
(No difference)
|
Revision as of 10:51, 11 August 2018
| Sophon | |
| |
| Sophon Logo | |
| Developer | Bitmain |
| Manufacturer | TSMC |
| Type | Neural Processors |
| Introduction | October 25, 2017 (announced) October 25, 2017 (launch) |
| Process | 28 nm 0.028 μm , 12 nm2.8e-5 mm 0.012 μm
1.2e-5 mm |
| Technology | CMOS |
Sophon is a family of low-power neural processors designed by Bitmain.
Retrieved from "https://en.wikichip.org/w/index.php?title=bitmain/sophon&oldid=81387"
Facts about "Sophon - Bitmain"
| designer | Bitmain + |
| first announced | October 25, 2017 + |
| first launched | October 25, 2017 + |
| full page name | bitmain/sophon + |
| instance of | integrated circuit family + |
| main designer | Bitmain + |
| manufacturer | TSMC + |
| name | Sophon + |
| process | 28 nm (0.028 μm, 2.8e-5 mm) + and 12 nm (0.012 μm, 1.2e-5 mm) + |
| technology | CMOS + |
