FastMATH
FastMATH and FastMIPS chips
Developer	Intrinsity
Manufacturer	TSMC
Type	Microprocessors
Introduction	2000 (announced) 2002 (launch)
Architecture	32-bit vector/matrix math processor + RISC cpu
Word size	32 bit 4 octets 8 nibbles
Process	130 nm 0.13 μm 1.3e-4 mm
Technology	CMOS
Clock	1 GHz-3 GHz
Package	CBGA-670

FastMATH was a family of matrix and vector math processors with an on-die RISC CPUs introduced by Intrinsity. The chips were developed using Intrinsity's own proprietary Fast14 technology.

Architecture

Main article: FastMATH Microarchitecture

FastMATH was a series of microprocessors developed by Intrinsity using Fast14 technology - i.e. processors designed using custom dynamic domino logic. These chips incorporate the FastMIPS core along with a custom high-performance matrix and vector math coprocessor.

Matrix and Vector Math Processing Unit

The unit is designed as a single-instruction, multiple-data (SIMD) architecture capable of oeprating on 4x4 arrays of 32-bit values. Operates support fixed-point matrix, vector, and scalar data types with dedicated local register file. Data arrays are directly fetched from L2 cache.

• Zero-cycle latency, two-cycle throughput
• 64 GOPS (peak) at 2 GHz
• 551,000 radix-4 1024-point 16-bit FFTs/sec at 2 GHz
• 32 GMACs/sec at 2 GHz

This section requires expansion; you can help adding the missing info.

Members

FastMATH Processors
Model	µarch	Process	Launched	Frequency	Power	Memory	VCORE
FastMATH-1.5	FashMATH	130 nm 0.13 μm 1.3e-4 mm	2002	1.5 GHz 1,500 MHz 1,500,000 kHz	13.5 W 13,500 mW 0.0181 hp 0.0135 kW	1,024 MiB 1,048,576 KiB 1,073,741,824 B 1 GiB 9.765625e-4 TiB	1 V 10 dV 100 cV 1,000 mV
FastMATH-2	FashMATH	130 nm 0.13 μm 1.3e-4 mm	2002	2 GHz 2,000 MHz 2,000,000 kHz	15 W 15,000 mW 0.0201 hp 0.015 kW	1,024 MiB 1,048,576 KiB 1,073,741,824 B 1 GiB 9.765625e-4 TiB	1 V 10 dV 100 cV 1,000 mV
FastMATH-3	FashMATH	130 nm 0.13 μm 1.3e-4 mm		3 GHz 3,000 MHz 3,000,000 kHz		1,024 MiB 1,048,576 KiB 1,073,741,824 B 1 GiB 9.765625e-4 TiB	1.25 V 12.5 dV 125 cV 1,250 mV
FastMATH-LP	FashMATH	130 nm 0.13 μm 1.3e-4 mm	2003	1 GHz 1,000 MHz 1,000,000 kHz	6 W 6,000 mW 0.00805 hp 0.006 kW	1,024 MiB 1,048,576 KiB 1,073,741,824 B 1 GiB 9.765625e-4 TiB	0.85 V 8.5 dV 85 cV 850 mV
Count: 4

Documents

Evaluation Board

Manuals

• FastMATH Product Brief
• FastMATH evaluation board technical summary

White Paper

• Advanced Processing Techniques
• Chip Rate Processing
• Computed Tomography
• FixedPoint
• Hard Copy Imaging
• RACH Preamble Detection
• Symbol Rate Processing
• Timing of Single Threaded Application

Others

• FastMATH Presentation