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Cavium CN5840-900 EXP
General Info
Designer	Cavium
Manufacturer	TSMC
Model Number	CN5840-900 EXP
Part Number	CN5840-900BG1521-EXP
Market	Network
Introduction	October 9, 2006 (announced) February, 2007 (launched)
General Specs
Family	OCTEON Plus
Series	CN58xx
Frequency	900 MHz
Microarchitecture
ISA	MIPS64 (MIPS)
Microarchitecture	cnMIPS
Process	90 nm
Technology	CMOS
Word Size	64 bit
Cores	8
Threads	8
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Packaging
Package FCBGA-1521 (BGA) Ball Count 1521 Interconnect BGA-1521

CN5840-900 EXP is a 64-bit octa-core MIPS network microprocessor designed by Cavium and introduced in 2007. This processor, which incorporates eight cnMIPS cores, operates at 900 MHz and supports up to DDR2-800 ECC memory. This MPU includes a number of hardware accelerators specifically for improving the performance of various software such as RegEx, compression/decompression, and TCP acceleration.

Cache

Main article: cnMIPS § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 384 KiB 393,216 B 0.375 MiB L1I$ 256 KiB 262,144 B 0.25 MiB 8x32 KiB 64-way set associative   L1D$ 128 KiB 131,072 B 0.125 MiB 8x16 KiB 64-way set associative   L2$ 2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB     1x2 MiB 8-way set associative

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR2-800 Supports ECC Yes Controllers 1 Channels 1 Width 128 bit Max Bandwidth 11.92 GiB/s 12,206.08 MiB/s 12.799 GB/s 12,799.003 MB/s 0.0116 TiB/s 0.0128 TB/s Bandwidth Single 11.92 GiB/s

Expansions

[Edit/Modify Expansions Info]

	Expansion Options
	PCI-X Width 64 bit Clock 133.33 MHz Rate 1,017.25 MiB/s Features host or slave UART Ports 2 GP I/O Yes

Networking

[Edit/Modify Network Info]

	Networking
	MII RGMII Yes (Ports: 8) SPI SPI-4.2 Yes (Ports: 2)

Hardware Accelerators

[Edit/Modify Accelerators Info]

	Hardware Accelerators
	RegEx RegEx Yes Features 32 Engines Networking TCP Yes QoS Yes Compression Compression Yes Decompression Yes

Block diagram

Datasheet

• OCTEON CN58XX Processors Product Brief