From WikiChip
Seattle - Cores - AMD
Edit Values | |
Seattle | |
General Info | |
Designer | AMD |
Manufacturer | GlobalFoundries |
Introduction | January 2014 (announced) January 2016 (launched) |
Microarchitecture | |
ISA | ARMv8 |
Microarchitecture | Cortex-A57 |
Word Size | 8 octets 64 bit16 nibbles |
Process | 28 nm 0.028 μm 2.8e-5 mm |
Technology | CMOS |
Packaging | |
Package | BGA-1021 |
Package Type | Organic Micro Ball Grid Array |
Dimension | 27 mm 2.7 cm × 27 mm1.063 in 2.7 cm 1.063 in |
Pitch | 0.65 mm 0.0256 in |
Contacts | 1021 |
Seattle is the codename for a series of AMD server microprocessors based on the Cortex-A57 microarchitecture.
Common Features
All Seattle processors have the following features:
- Up to 8 Cortex-A57 CPU cores
- 4 core complexes, each comprising 2 CPU cores and 1 MiB shared L2 cache
- 8 × 48 KiB L1 instruction cache, 3-way set associative, parity protected
- 8 × 32 KiB L1 data cache, 2-way set associative, ECC protected
- 4 × 1 MiB shared L2 cache, 16-way set associative, ECC protected
- 8 MiB shared L3 cache, 16-way set associative, ECC protected, integrated snoop filter
- Full cache coherency
- ARM Cortex-A5 System Control Processor
- Cryptographic Coprocessor (AES, ECC, RSA, SHA, Zlib compr./decompr., TRNG)
- 2 × 64/72 bit DDR3 SDRAM interface up to 800 MHz, PC3-12800 (DDR3-1600), 25.6 GB/s or
- 2 × 64/72 bit DDR4 SDRAM interface up to 933 MHz, PC4-14900 (DDR4-1866), 29.9 GB/s
- Up to 4 UDIMMs, RDIMMs, or SODIMMs (2 per channel), ECC supported
- Up to 128 GiB total with RDIMMs
- PCIe Gen 1.0, 2.0, 3.0 (8 GT/s)
- 8 lanes configurable 1x8, 2x4, 1x4 + 2x2
- Integrated Controller Hub
- 14 × SATA 1.0, 2.0, 3.0 (6 Gb/s)
- 2 × 10 Gigabit Ethernet (10GBASE-KR, 1000BASE-KX)
- 1 × 1 Gigabit Ethernet system management port
- SPI, UART, I2C, GPIO
Seattle Processors
List of Seattle Processors | ||||||||||
---|---|---|---|---|---|---|---|---|---|---|
Model | Family | Cores | TDP | L2$ | L3$ | Freq | ||||
A1120 | Opteron | 4 | 25 W 25,000 mW 0.0335 hp 0.025 kW | 2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB | 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB | 1.7 GHz 1,700 MHz 1,700,000 kHz | ||||
A1150 | Opteron | 8 | 32 W 32,000 mW 0.0429 hp 0.032 kW | 4 MiB 4,096 KiB 4,194,304 B 0.00391 GiB | 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB | 1.7 GHz 1,700 MHz 1,700,000 kHz | ||||
A1170 | Opteron | 8 | 32 W 32,000 mW 0.0429 hp 0.032 kW | 4 MiB 4,096 KiB 4,194,304 B 0.00391 GiB | 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB | 2 GHz 2,000 MHz 2,000,000 kHz | ||||
Count: 3 |
References
- "Product Brief: AMD Opteron™ A1100 SOC Series", PID 158465-B, 2016
- "Hot Chips 26: The AMD Opteron™ A1100 Processor Codenamed "Seattle"", August 11, 2014
- "Introducing the AMD Opteron™ A1100 for the Datacenter", January 2016
Facts about "Seattle - Cores - AMD"
designer | AMD + |
first announced | January 2014 + |
first launched | January 2016 + |
instance of | core + |
isa | ARMv8 + |
manufacturer | GlobalFoundries + |
microarchitecture | Cortex-A57 + |
name | Seattle + |
package | BGA-1021 + |
process | 28 nm (0.028 μm, 2.8e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |