...), source (S) and drain (D) terminals. The gate is separated from the body by an [[gate oxide|insulating layer]] (pink).]] ...is a type of insulated-gate [[field-effect transistor]] that is fabricated by the [[thermal oxidation|controlled oxidation]] of a [[semiconductor]] (typi

...acturing using 32 nm process began in 2010. This technology was superseded by the [[28 nm lithography process|28 nm process]] (HN) / [[22 nm lithography ...Common Platform Alliance 20 nm node was a collaboration between [[IBM]], [[Samsung]], [[Freescale]], [[Toshiba]], [[Chartered Semiconductor Manufacturing]], [

...lf pitch. The 14 nm node was introduced in 2014/2015 and has been replaced by the [[10 nm process]]. <!-- Samsung -->

...gan in 2008 for memory and 2012 for [[MPU]]s. This technology was replaced by with [[20 nm lithography process|20 nm process]] (HN) in 2014 and [[16 nm l <!-- Samsung -->