-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Goya - Microarchitectures - Habana
< habana
Edit Values | |
Goya µarch | |
General Info | |
Arch Type | NPU |
Designer | Habana |
Manufacturer | TSMC |
Introduction | 2018 |
Process | 16 nm |
PE Configs | 8 |
Contemporary | |
Gaudi |
Goya is a 16-nanometer microarchitecture for inference neural processors designed by Habana Labs.
Process Technology
Goya-based processors are fabricated on TSMC 16-nanometer process.
Architecture
Block Diagram
This section is empty; you can help add the missing info by editing this page. |
Overview
This section is empty; you can help add the missing info by editing this page. |
Scalability
This section is empty; you can help add the missing info by editing this page. |
See also
Retrieved from "https://en.wikichip.org/w/index.php?title=habana/microarchitectures/goya&oldid=94892"
Hidden category:
Facts about "Goya - Microarchitectures - Habana"
codename | Goya + |
designer | Habana + |
first launched | 2018 + |
full page name | habana/microarchitectures/goya + |
instance of | microarchitecture + |
manufacturer | TSMC + |
name | Goya + |
process | 16 nm (0.016 μm, 1.6e-5 mm) + |
processing element count | 8 + |