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Cortex-A75 µarch
General Info
Arch Type	CPU
Designer	ARM Holdings
Manufacturer	TSMC
Introduction	May 29, 2017
Process	16 nm, 14 nm, 10 nm, 7 nm
Core Configs	1, 2
Pipeline
OoOE	Yes
Speculative	Yes
Reg Renaming	Yes
Stages	11-13
Decode	3-way
Instructions
ISA	ARMv8.2
Extensions	FPU, NEON
Cache
L1I Cache	8-64 KiB/core 4-way set associative
L1D Cache	8-64 KiB/core 4-way set associative
L2 Cache	64-256-512 KiB/core
L3 Cache	0-4 MiB/Cluster
Succession
Cortex-A73 Cortex-A76

Cortex-A75 (codename Prometheus) is the successor to the Cortex-A73, a low-power high-performance ARM microarchitecture designed by ARM Holdings for the mobile market. This microarchitecture is designed as a synthesizable IP core and is sold to other semiconductor companies to be implemented in their own chips. The Cortex-A75, which implemented the ARMv8.2 ISA, is the a performant core which is often combined with a number of lower power cores (e.g. Cortex-A55) in a DynamIQ big.LITTLE configuration to achieve better energy/performance.

Compiler support

Compiler	Arch-Specific	Arch-Favorable
Arm Compiler	-mcpu=cortex-a75	-mtune=cortex-a75
GCC	-mcpu=cortex-a75	-mtune=cortex-a75
LLVM	-mcpu=cortex-a75	-mtune=cortex-a75

If the Cortex-A75 is coupled with the Cortex-A55 in a big.LITTLE system, GCC also supports the following option:

Compiler	Tune
GCC	-mtune=cortex-a75.cortex-a55

Architecture

Key changes from Cortex-A73

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Block Diagram

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Memory Hierarchy

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